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Searched refs:REG_GMAC_IERPQ1 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam/include/same70/instance/
Dgmac.h173 #define REG_GMAC_IERPQ1 (0x40050600) /**< (GMAC) Interrupt Enable Register Priority Queue (… macro
372 #define REG_GMAC_IERPQ1 (*(__O uint32_t*)0x40050600U) /**< (GMAC) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dgmac.h174 #define REG_GMAC_IERPQ1 (0x40050600) /**< (GMAC) Interrupt Enable Register Priority Queue (… macro
374 #define REG_GMAC_IERPQ1 (*(__O uint32_t*)0x40050600U) /**< (GMAC) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dgmac.h237 #define REG_GMAC_IERPQ1 (0x40050604) /**< (GMAC) Interrupt Enable Register Priority Queue (… macro
461 #define REG_GMAC_IERPQ1 (*(__O uint32_t*)0x40050604U) /**< (GMAC) Interrupt Enable Registe… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dgmac.h237 #define REG_GMAC_IERPQ1 (0x40050604) /**< (GMAC) Interrupt Enable Register Priority Queue (… macro
461 #define REG_GMAC_IERPQ1 (*(__O uint32_t*)0x40050604U) /**< (GMAC) Interrupt Enable Registe… macro