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Searched refs:REG_ADC1_INTENSET (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dadc1.h40 #define REG_ADC1_INTENSET (0x42004805) /**< \brief (ADC1) Interrupt Enable Set */ macro
63 #define REG_ADC1_INTENSET (*(RwReg8 *)0x42004805UL) /**< \brief (ADC1) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dadc1.h40 #define REG_ADC1_INTENSET (0x42004805) /**< \brief (ADC1) Interrupt Enable Set */ macro
63 #define REG_ADC1_INTENSET (*(RwReg8 *)0x42004805UL) /**< \brief (ADC1) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dadc1.h49 #define REG_ADC1_INTENSET (0x4300202D) /**< \brief (ADC1) Interrupt Enable Set */ macro
74 #define REG_ADC1_INTENSET (*(RwReg8 *)0x4300202DUL) /**< \brief (ADC1) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dadc1.h49 #define REG_ADC1_INTENSET (0x4300202D) /**< \brief (ADC1) Interrupt Enable Set */ macro
74 #define REG_ADC1_INTENSET (*(RwReg8 *)0x4300202DUL) /**< \brief (ADC1) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dadc1.h49 #define REG_ADC1_INTENSET (0x4300202D) /**< \brief (ADC1) Interrupt Enable Set */ macro
74 #define REG_ADC1_INTENSET (*(RwReg8 *)0x4300202DUL) /**< \brief (ADC1) Interrupt Enable Se… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dadc1.h49 #define REG_ADC1_INTENSET (0x4300202D) /**< \brief (ADC1) Interrupt Enable Set */ macro
74 #define REG_ADC1_INTENSET (*(RwReg8 *)0x4300202DUL) /**< \brief (ADC1) Interrupt Enable Se… macro