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Searched refs:REG_ADC1_AVGCTRL (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samc21/instance/
Dadc1.h45 #define REG_ADC1_AVGCTRL (0x4200480C) /**< \brief (ADC1) Average Control */ macro
68 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4200480CUL) /**< \brief (ADC1) Average Control */ macro
/hal_atmel-latest/asf/sam0/include/samc21n/instance/
Dadc1.h45 #define REG_ADC1_AVGCTRL (0x4200480C) /**< \brief (ADC1) Average Control */ macro
68 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4200480CUL) /**< \brief (ADC1) Average Control */ macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dadc1.h41 #define REG_ADC1_AVGCTRL (0x4300200A) /**< \brief (ADC1) Average Control */ macro
66 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4300200AUL) /**< \brief (ADC1) Average Control */ macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dadc1.h41 #define REG_ADC1_AVGCTRL (0x4300200A) /**< \brief (ADC1) Average Control */ macro
66 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4300200AUL) /**< \brief (ADC1) Average Control */ macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dadc1.h41 #define REG_ADC1_AVGCTRL (0x4300200A) /**< \brief (ADC1) Average Control */ macro
66 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4300200AUL) /**< \brief (ADC1) Average Control */ macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dadc1.h41 #define REG_ADC1_AVGCTRL (0x4300200A) /**< \brief (ADC1) Average Control */ macro
66 #define REG_ADC1_AVGCTRL (*(RwReg8 *)0x4300200AUL) /**< \brief (ADC1) Average Control */ macro