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Searched refs:NVMCTRL_OTP5 (Results 1 – 25 of 57) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samr34/component/
Dnvmctrl.h382 #define ADC_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
387 #define ADC_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
473 #define USB_FUSES_TRANSN_ADDR NVMCTRL_OTP5
478 #define USB_FUSES_TRANSP_ADDR NVMCTRL_OTP5
483 #define USB_FUSES_TRIM_ADDR NVMCTRL_OTP5
/hal_atmel-latest/asf/sam0/include/saml21/component/
Dnvmctrl.h382 #define ADC_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
387 #define ADC_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
473 #define USB_FUSES_TRANSN_ADDR NVMCTRL_OTP5
478 #define USB_FUSES_TRANSP_ADDR NVMCTRL_OTP5
483 #define USB_FUSES_TRIM_ADDR NVMCTRL_OTP5
/hal_atmel-latest/asf/sam0/include/samc21/component/
Dnvmctrl.h405 #define ADC0_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
410 #define ADC0_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
415 #define ADC1_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
420 #define ADC1_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
/hal_atmel-latest/asf/sam0/include/samc21n/component/
Dnvmctrl.h405 #define ADC0_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
410 #define ADC0_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
415 #define ADC1_FUSES_BIASCOMP_ADDR NVMCTRL_OTP5
420 #define ADC1_FUSES_BIASREFBUF_ADDR NVMCTRL_OTP5
/hal_atmel-latest/asf/sam0/include/samc20/
Dsamc20e15a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20e16a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20e17a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20e18a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j18a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j18au.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20g15a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20g16a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20g17a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20g18a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j15a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j16a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j17a.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc20j17au.h390 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
473 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
/hal_atmel-latest/asf/sam0/include/samr34/
Dsamr34j17b.h411 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
497 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamr34j16b.h411 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
497 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamr34j18b.h411 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
497 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
/hal_atmel-latest/asf/sam0/include/samc21/
Dsamc21e15a.h417 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
511 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc21e16a.h417 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
511 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc21e17a.h417 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
511 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
Dsamc21e18a.h417 #define NVMCTRL_OTP5 (0x00806020) /**< \brief (NVMCTRL) OTP5 Base Address */ macro
511 #define NVMCTRL_OTP5 (0x00806020UL) /**< \brief (NVMCTRL) OTP5 Base Address */ macro

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