Searched refs:REG_SSC_IMR (Results 1 – 6 of 6) sorted by relevance
50 #define REG_SSC_IMR (0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ macro69 #define REG_SSC_IMR (*(__I uint32_t*)0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ macro
52 #define REG_SSC_IMR (0x4000404C) /**< (SSC) Interrupt Mask Register */ macro73 #define REG_SSC_IMR (*(__I uint32_t*)0x4000404CU) /**< (SSC) Interrupt Mask Register */ macro
52 #define REG_SSC_IMR (0x4000404C) /**< (SSC) Interrupt Mask Register */ macro74 #define REG_SSC_IMR (*(__I uint32_t*)0x4000404CU) /**< (SSC) Interrupt Mask Register */ macro
50 #define REG_SSC_IMR (0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ macro79 #define REG_SSC_IMR (*(__I uint32_t*)0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ macro
