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Searched refs:REG_SPI0_CSR3 (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-3.7.0/asf/sam/include/same70/instance/
Dspi0.h49 #define REG_SPI0_CSR3 (0x4000803C) /**< (SPI0) Chip Select Register 3 */ macro
67 #define REG_SPI0_CSR3 (*(__IO uint32_t*)0x4000803CU) /**< (SPI0) Chip Select Register 3 */ macro
/hal_atmel-3.7.0/asf/sam/include/samv71b/instance/
Dspi0.h49 #define REG_SPI0_CSR3 (0x4000803C) /**< (SPI0) Chip Select Register 3 */ macro
67 #define REG_SPI0_CSR3 (*(__IO uint32_t*)0x4000803CU) /**< (SPI0) Chip Select Register 3 */ macro
/hal_atmel-3.7.0/asf/sam/include/samv71/instance/
Dspi0.h49 #define REG_SPI0_CSR3 (0x4000803C) /**< (SPI0) Chip Select Register (CS_number = 0) 3 */ macro
68 #define REG_SPI0_CSR3 (*(__IO uint32_t*)0x4000803CU) /**< (SPI0) Chip Select Register (CS… macro
/hal_atmel-3.7.0/asf/sam/include/same70b/instance/
Dspi0.h49 #define REG_SPI0_CSR3 (0x4000803C) /**< (SPI0) Chip Select Register 3 */ macro
67 #define REG_SPI0_CSR3 (*(__IO uint32_t*)0x4000803CU) /**< (SPI0) Chip Select Register 3 */ macro