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Searched refs:REG_SERCOM0_USART_INTENSET (Results 1 – 14 of 14) sorted by relevance

/hal_atmel-3.7.0/asf/sam0/include/samd20/instance/
Dsercom0.h68 #define REG_SERCOM0_USART_INTENSET (0x4200080D) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
106 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x4200080DUL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samd21/instance/
Dsercom0.h70 #define REG_SERCOM0_USART_INTENSET (0x42000816) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
113 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000816UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samr21/instance/
Dsercom0.h70 #define REG_SERCOM0_USART_INTENSET (0x42000816) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
113 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000816UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samc21n/instance/
Dsercom0.h72 #define REG_SERCOM0_USART_INTENSET (0x42000416) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
116 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/saml21/instance/
Dsercom0.h71 #define REG_SERCOM0_USART_INTENSET (0x42000016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
114 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samr34/instance/
Dsercom0.h71 #define REG_SERCOM0_USART_INTENSET (0x42000016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
114 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samc20n/instance/
Dsercom0.h72 #define REG_SERCOM0_USART_INTENSET (0x42000416) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
116 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samr35/instance/
Dsercom0.h71 #define REG_SERCOM0_USART_INTENSET (0x42000016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
114 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samc20/instance/
Dsercom0.h72 #define REG_SERCOM0_USART_INTENSET (0x42000416) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
116 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samc21/instance/
Dsercom0.h72 #define REG_SERCOM0_USART_INTENSET (0x42000416) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
116 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/samd51/instance/
Dsercom0.h77 #define REG_SERCOM0_USART_INTENSET (0x40003016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
128 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/same51/instance/
Dsercom0.h77 #define REG_SERCOM0_USART_INTENSET (0x40003016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
128 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/same53/instance/
Dsercom0.h77 #define REG_SERCOM0_USART_INTENSET (0x40003016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
128 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) USART Interrupt … macro
/hal_atmel-3.7.0/asf/sam0/include/same54/instance/
Dsercom0.h77 #define REG_SERCOM0_USART_INTENSET (0x40003016) /**< \brief (SERCOM0) USART Interrupt Enable Set */ macro
128 #define REG_SERCOM0_USART_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) USART Interrupt … macro