| /hal_atmel-3.7.0/asf/sam0/include/samd20/instance/ |
| D | sercom0.h | 40 #define REG_SERCOM0_I2CM_INTENSET (0x4200080D) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
78 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x4200080DUL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samd21/instance/ |
| D | sercom0.h | 38 #define REG_SERCOM0_I2CM_INTENSET (0x42000816) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
81 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000816UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samr21/instance/ |
| D | sercom0.h | 38 #define REG_SERCOM0_I2CM_INTENSET (0x42000816) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
81 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000816UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samc21n/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
83 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/saml21/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
82 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samr34/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
82 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samc20n/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
83 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samr35/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
82 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samc20/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
83 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samc21/instance/ |
| D | sercom0.h | 39 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
83 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/samd51/instance/ |
| D | sercom0.h | 40 #define REG_SERCOM0_I2CM_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
91 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/same51/instance/ |
| D | sercom0.h | 40 #define REG_SERCOM0_I2CM_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
91 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/same53/instance/ |
| D | sercom0.h | 40 #define REG_SERCOM0_I2CM_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
91 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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| /hal_atmel-3.7.0/asf/sam0/include/same54/instance/ |
| D | sercom0.h | 40 #define REG_SERCOM0_I2CM_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro
91 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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