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Searched refs:PORT_PA27H_GCLK_IO0 (Results 1 – 25 of 88) sorted by relevance

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/hal_atmel-3.7.0/asf/sam0/include/samd20/pio/
Dsamd20e14.h93 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20e15.h93 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20e16.h93 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20e17.h93 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20e18.h93 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g18u.h111 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g17u.h111 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g14.h121 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g15.h121 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g16.h121 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g17.h121 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd20g18.h121 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
/hal_atmel-3.7.0/asf/sam0/include/samd21/pio/
Dsamd21e15a.h92 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd21e16a.h92 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd21e17a.h92 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamd21e18a.h92 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
/hal_atmel-3.7.0/asf/sam0/include/samr21/pio/
Dsamr21e18a.h106 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamr21e16a.h106 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamr21e17a.h106 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
/hal_atmel-3.7.0/asf/sam0/include/samc20/pio/
Dsamc20e15a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamc20e16a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamc20e17a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamc20e18a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
/hal_atmel-3.7.0/asf/sam0/include/samc21/pio/
Dsamc21e15a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro
Dsamc21e16a.h150 #define PORT_PA27H_GCLK_IO0 (_UL_(1) << 27) macro

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