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Searched refs:MUX_PB08D_SERCOM4_PAD0 (Results 1 – 25 of 70) sorted by relevance

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/hal_atmel-3.6.0/asf/sam0/include/samd20/pio/
Dsamd20g18u.h477 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
478 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g17u.h477 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
478 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g14.h514 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
515 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g15.h514 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
515 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g16.h514 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
515 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g17.h514 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
515 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20g18.h514 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
515 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20j14.h636 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
637 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20j15.h636 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
637 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20j16.h636 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
637 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20j17.h636 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
637 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd20j18.h636 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
637 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
/hal_atmel-3.6.0/asf/sam0/include/samr21/pio/
Dsamr21e18a.h418 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
419 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21e16a.h418 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
419 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21e17a.h418 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
419 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21e19a.h488 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
489 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21g16a.h558 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
559 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21g17a.h558 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
559 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamr21g18a.h558 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
559 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
/hal_atmel-3.6.0/asf/sam0/include/samd21/pio/
Dsamd21g17au.h489 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
490 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd21g18au.h489 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
490 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd21g15a.h526 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
527 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd21g16a.h526 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
527 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd21g17a.h526 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
527 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
Dsamd21g18a.h526 #define MUX_PB08D_SERCOM4_PAD0 _L_(3) macro
527 #define PINMUX_PB08D_SERCOM4_PAD0 ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)

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