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Searched refs:MUX_PA10H_GCLK_IO4 (Results 1 – 25 of 88) sorted by relevance

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/hal_atmel-3.6.0/asf/sam0/include/samd20/pio/
Dsamd20e14.h115 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
116 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20e15.h115 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
116 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20e16.h115 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
116 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20e17.h115 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
116 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20e18.h115 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
116 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g18u.h133 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
134 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g17u.h133 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
134 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g14.h147 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
148 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g15.h147 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
148 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g16.h147 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
148 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g17.h147 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
148 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd20g18.h147 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
148 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
/hal_atmel-3.6.0/asf/sam0/include/samd21/pio/
Dsamd21e15a.h114 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
115 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd21e16a.h114 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
115 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd21e17a.h114 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
115 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamd21e18a.h114 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
115 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
/hal_atmel-3.6.0/asf/sam0/include/samr21/pio/
Dsamr21e18a.h144 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
145 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamr21e16a.h144 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
145 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamr21e17a.h144 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
145 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
/hal_atmel-3.6.0/asf/sam0/include/samc20/pio/
Dsamc20e16a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamc20e17a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamc20e15a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamc20e18a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
/hal_atmel-3.6.0/asf/sam0/include/samc21/pio/
Dsamc21e15a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)
Dsamc21e16a.h172 #define MUX_PA10H_GCLK_IO4 _L_(7) macro
173 #define PINMUX_PA10H_GCLK_IO4 ((PIN_PA10H_GCLK_IO4 << 16) | MUX_PA10H_GCLK_IO4)

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