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Searched refs:HSMCI_CMDR_MAXLAT_5 (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/sam3x/component/
Dhsmci.h138 #define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ macro
/hal_atmel-3.6.0/asf/sam/include/sam4e/component/
Dhsmci.h151 #define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ macro
/hal_atmel-3.6.0/asf/sam/include/sam4s/component/
Dhsmci.h155 #define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/component/
Dhsmci.h304 #define HSMCI_CMDR_MAXLAT_5 (HSMCI_CMDR_MAXLAT_5_Val << HSMCI_CMDR_MAXLAT_Pos) /**… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/component/
Dhsmci.h304 #define HSMCI_CMDR_MAXLAT_5 (HSMCI_CMDR_MAXLAT_5_Val << HSMCI_CMDR_MAXLAT_Pos) /**… macro
/hal_atmel-3.6.0/asf/sam/include/same70/component/
Dhsmci.h304 #define HSMCI_CMDR_MAXLAT_5 (HSMCI_CMDR_MAXLAT_5_Val << HSMCI_CMDR_MAXLAT_Pos) /**… macro
/hal_atmel-3.6.0/asf/sam/include/samv71/component/
Dhsmci.h304 #define HSMCI_CMDR_MAXLAT_5 (HSMCI_CMDR_MAXLAT_5_Val << HSMCI_CMDR_MAXLAT_Pos) /**… macro