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Searched refs:CHCTRLB (Results 1 – 13 of 13) sorted by relevance

/hal_atmel-3.6.0/asf/sam0/include/samc20/component/
Ddmac.h969 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samd21/component/
Ddmac.h1044 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samc21n/component/
Ddmac.h989 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samr21/component/
Ddmac.h1044 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samc20n/component/
Ddmac.h989 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samr35/component/
Ddmac.h1089 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samr34/component/
Ddmac.h1089 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/saml21/component/
Ddmac.h1089 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/samc21/component/
Ddmac.h1041 __IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x44 (R/W 32) Channel Control B */ member
/hal_atmel-3.6.0/asf/sam0/include/same51/component/
Ddmac.h1356 …__IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x04 (R/W 8) Channel n Control B … member
/hal_atmel-3.6.0/asf/sam0/include/samd51/component/
Ddmac.h1356 …__IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x04 (R/W 8) Channel n Control B … member
/hal_atmel-3.6.0/asf/sam0/include/same53/component/
Ddmac.h1356 …__IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x04 (R/W 8) Channel n Control B … member
/hal_atmel-3.6.0/asf/sam0/include/same54/component/
Ddmac.h1356 …__IO DMAC_CHCTRLB_Type CHCTRLB; /**< \brief Offset: 0x04 (R/W 8) Channel n Control B … member