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Searched refs:SUPC_BODVDD_PSEL_DIV8192_Val (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc21/component/
Dsupc.h232 #define SUPC_BODVDD_PSEL_DIV8192_Val _U_(0xC) /**< \brief (SUPC_BODVDD) Divide clock by 8192… macro
248 #define SUPC_BODVDD_PSEL_DIV8192 (SUPC_BODVDD_PSEL_DIV8192_Val << SUPC_BODVDD_PSEL_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc20/component/
Dsupc.h232 #define SUPC_BODVDD_PSEL_DIV8192_Val _U_(0xC) /**< \brief (SUPC_BODVDD) Divide clock by 8192… macro
248 #define SUPC_BODVDD_PSEL_DIV8192 (SUPC_BODVDD_PSEL_DIV8192_Val << SUPC_BODVDD_PSEL_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc20n/component/
Dsupc.h244 #define SUPC_BODVDD_PSEL_DIV8192_Val _U_(0xC) /**< \brief (SUPC_BODVDD) Divide clock by 8192… macro
260 #define SUPC_BODVDD_PSEL_DIV8192 (SUPC_BODVDD_PSEL_DIV8192_Val << SUPC_BODVDD_PSEL_Pos)
/hal_atmel-3.5.0-3.4.0/asf/sam0/include/samc21n/component/
Dsupc.h244 #define SUPC_BODVDD_PSEL_DIV8192_Val _U_(0xC) /**< \brief (SUPC_BODVDD) Divide clock by 8192… macro
260 #define SUPC_BODVDD_PSEL_DIV8192 (SUPC_BODVDD_PSEL_DIV8192_Val << SUPC_BODVDD_PSEL_Pos)