Home
last modified time | relevance | path

Searched refs:REG_TC1_CMR0 (Results 1 – 8 of 8) sorted by relevance

/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4l/instance/
Dtc1.h35 #define REG_TC1_CMR0 (0x40014004) /**< \brief (TC1) Channel Mode Register Channel 0 */ macro
74 #define REG_TC1_CMR0 (*(RwReg *)0x40014004UL) /**< \brief (TC1) Channel Mode Registe… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam3x/instance/
Dtc1.h36 …#define REG_TC1_CMR0 (0x40084004U) /**< \brief (TC1) Channel Mode Register (chan… macro
78 …#define REG_TC1_CMR0 (*(__IO uint32_t*)0x40084004U) /**< \brief (TC1) Channel Mode Register (chan… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4s/instance/
Dtc1.h36 …#define REG_TC1_CMR0 (0x40014004U) /**< \brief (TC1) Channel Mode Register (chan… macro
78 …#define REG_TC1_CMR0 (*(__IO uint32_t*)0x40014004U) /**< \brief (TC1) Channel Mode Register (chan… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/same70/instance/
Dtc1.h38 #define REG_TC1_CMR0 (0x40010004) /**< (TC1) Channel Mode Register (channel = 0) 0 */ macro
88 #define REG_TC1_CMR0 (*(__IO uint32_t*)0x40010004U) /**< (TC1) Channel Mode Register (ch… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/sam4e/instance/
Dtc1.h36 #define REG_TC1_CMR0 (0x40094004U) /**< \brief (TC1) Channel Mode Register (channel = 0) … macro
102 #define REG_TC1_CMR0 (*(RwReg*)0x40094004U) /**< \brief (TC1) Channel Mode Register (channel = 0) … macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71/instance/
Dtc1.h38 #define REG_TC1_CMR0 (0x40010004) /**< (TC1) Channel Mode Register (channel = 0) 0 */ macro
89 #define REG_TC1_CMR0 (*(__IO uint32_t*)0x40010004U) /**< (TC1) Channel Mode Register (ch… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/samv71b/instance/
Dtc1.h38 #define REG_TC1_CMR0 (0x40010004) /**< (TC1) Channel Mode Register (channel = 0) 0 */ macro
88 #define REG_TC1_CMR0 (*(__IO uint32_t*)0x40010004U) /**< (TC1) Channel Mode Register (ch… macro
/hal_atmel-3.5.0-3.4.0/asf/sam/include/same70b/instance/
Dtc1.h38 #define REG_TC1_CMR0 (0x40010004) /**< (TC1) Channel Mode Register (channel = 0) 0 */ macro
88 #define REG_TC1_CMR0 (*(__IO uint32_t*)0x40010004U) /**< (TC1) Channel Mode Register (ch… macro