Searched refs:TBD (Results 1 – 9 of 9) sorted by relevance
22 **TBD** - to be decided34 …_ | Y | Y | Y | TBD | TBD |42 …ate register banks for fast interrupts | Y | Y | TBD | N …44 … | Y | Y | TBD [#f6]_ | TBD | TBD …46 …ing (SMP) support, switch-based | N/A | Y | TBD | Y …52 … | Y | N [#f3]_ | TBD [#f6]_ | TBD | TBD …54 … | Y | N [#f3]_ | N/A | TBD | TBD |56 … | Y | Y | N | TBD | TBD |58 … (MPU) | Y | Y | TBD | N …60 … (MMU) | N/A | N | TBD | N …
58 # as this is causing CI failures. Actual root-cause is TBD.
203 - 04: TBD.
32 - TBDμW/MHz Executing from Cache at 1.1V
35 - TBDμW/MHz Executing from Cache at 1.1V
1225 - * ``master / slave`` => TBD1229 - * ``master / slave`` => TBD1232 or new specification is TBD. Zephyr will update I2C when replacement1239 - * ``master / slave`` => TBD1243 - * ``master / slave`` => TBD
42 Systematic Capability (SC) 3 for a limited source scope (see certification scope TBD). Since the
382 testing for the "Zephyr compatibility test suite" (details TBD)
1713 | TBD | Debug information |
