Home
last modified time | relevance | path

Searched refs:NC0ENABLE (Results 1 – 3 of 3) sorted by relevance

/hal_ambiq-3.7.0/mcu/apollo4p/hal/mcu/
Dam_hal_cachectrl.c307 CPU->CACHECFG_b.NC0ENABLE = pNcCfg->bEnable; in am_hal_cachectrl_control()
/hal_ambiq-3.7.0/CMSIS/AmbiqMicro/Include/
Dapollo4b_generic.h1802 …__IOM uint32_t NC0ENABLE : 1; /*!< [2..2] Enable Non-cacheable region 0. See NCR0 regi… member
Dapollo4p.h1912 …__IOM uint32_t NC0ENABLE : 1; /*!< [2..2] Enable Non-cacheable region 0. See NCR0 regi… member