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Searched refs:CACHEPWDSLP (Results 1 – 5 of 5) sorted by relevance

/hal_ambiq-3.7.0/mcu/apollo4p/hal/
Dam_hal_pwrctrl.c1071 PWRCTRL->MEMRETCFG_b.CACHEPWDSLP = PWRCTRL_MEMRETCFG_CACHEPWDSLP_DIS; in am_hal_pwrctrl_mcu_memory_config()
1075 PWRCTRL->MEMRETCFG_b.CACHEPWDSLP = PWRCTRL_MEMRETCFG_CACHEPWDSLP_EN; in am_hal_pwrctrl_mcu_memory_config()
1164 (PWRCTRL->MEMRETCFG_b.CACHEPWDSLP == PWRCTRL_MEMRETCFG_CACHEPWDSLP_DIS); in am_hal_pwrctrl_mcu_memory_config_get()
/hal_ambiq-3.7.0/CMSIS/AmbiqMicro/Include/
Dapollo3.h7998 …__IOM uint32_t CACHEPWDSLP : 1; /*!< [31..31] power down cache in deep sleep … member
Dapollo3p.h8905 …__IOM uint32_t CACHEPWDSLP : 1; /*!< [31..31] power down cache in deep sleep … member
Dapollo4b_generic.h20213 …__IOM uint32_t CACHEPWDSLP : 1; /*!< [4..4] power down cache in deep sleep … member
Dapollo4p.h20458 …__IOM uint32_t CACHEPWDSLP : 1; /*!< [4..4] power down cache in deep sleep … member