| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/HTMR/ |
| D | htmr_reva.c | 36 #define ASYNC_MODE (MXC_F_HTMR_REVA_CTRL_ACRE & htmr->ctrl) 44 int MXC_HTMR_RevA_Init(mxc_htmr_reva_regs_t *htmr, uint32_t sec, uint8_t ssec) in MXC_HTMR_RevA_Init() argument 46 if (htmr == NULL) { in MXC_HTMR_RevA_Init() 50 if (MXC_HTMR_CheckBusy((mxc_htmr_regs_t *)htmr)) { in MXC_HTMR_RevA_Init() 54 htmr->ctrl = MXC_F_HTMR_REVA_CTRL_WE; // Allow Writes in MXC_HTMR_RevA_Init() 56 if (MXC_HTMR_CheckBusy((mxc_htmr_regs_t *)htmr)) { in MXC_HTMR_RevA_Init() 60 htmr->ctrl = HTMR_CTRL_RESET_DEFAULT; // Start with a Clean Register in MXC_HTMR_RevA_Init() 62 if (MXC_HTMR_CheckBusy((mxc_htmr_regs_t *)htmr)) { in MXC_HTMR_RevA_Init() 66 htmr->ctrl |= MXC_F_HTMR_REVA_CTRL_WE; // Set Write Enable, allow writing to reg. in MXC_HTMR_RevA_Init() 68 if (MXC_HTMR_CheckBusy((mxc_htmr_regs_t *)htmr)) { in MXC_HTMR_RevA_Init() [all …]
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| D | htmr_me13.c | 34 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval) in MXC_HTMR_Init() argument 36 if (htmr == NULL) { in MXC_HTMR_Init() 45 if (htmr == MXC_HTMR0) { in MXC_HTMR_Init() 47 } else if (htmr == MXC_HTMR1) { in MXC_HTMR_Init() 54 return MXC_HTMR_RevA_Init((mxc_htmr_reva_regs_t *)htmr, longInterval, shortInterval); in MXC_HTMR_Init() 57 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr) in MXC_HTMR_Start() argument 59 return MXC_HTMR_RevA_Start((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Start() 62 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr) in MXC_HTMR_Stop() argument 64 return MXC_HTMR_RevA_Stop((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Stop() 67 int MXC_HTMR_GetShortCount(mxc_htmr_regs_t *htmr) in MXC_HTMR_GetShortCount() argument [all …]
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| D | htmr_me14.c | 34 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval) in MXC_HTMR_Init() argument 36 if (htmr == NULL) { in MXC_HTMR_Init() 45 if (htmr == MXC_HTMR0) { in MXC_HTMR_Init() 47 } else if (htmr == MXC_HTMR1) { in MXC_HTMR_Init() 54 return MXC_HTMR_RevA_Init((mxc_htmr_reva_regs_t *)htmr, longInterval, shortInterval); in MXC_HTMR_Init() 57 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr) in MXC_HTMR_Start() argument 59 return MXC_HTMR_RevA_Start((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Start() 62 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr) in MXC_HTMR_Stop() argument 64 return MXC_HTMR_RevA_Stop((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Stop() 67 int MXC_HTMR_GetShortCount(mxc_htmr_regs_t *htmr) in MXC_HTMR_GetShortCount() argument [all …]
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| D | htmr_me55.c | 34 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval) in MXC_HTMR_Init() argument 36 if (htmr == NULL) { in MXC_HTMR_Init() 45 if (htmr == MXC_HTMR0) { in MXC_HTMR_Init() 47 } else if (htmr == MXC_HTMR1) { in MXC_HTMR_Init() 54 return MXC_HTMR_RevA_Init((mxc_htmr_reva_regs_t *)htmr, longInterval, shortInterval); in MXC_HTMR_Init() 57 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr) in MXC_HTMR_Start() argument 59 return MXC_HTMR_RevA_Start((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Start() 62 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr) in MXC_HTMR_Stop() argument 64 return MXC_HTMR_RevA_Stop((mxc_htmr_reva_regs_t *)htmr); in MXC_HTMR_Stop() 67 int MXC_HTMR_GetShortCount(mxc_htmr_regs_t *htmr) in MXC_HTMR_GetShortCount() argument [all …]
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| D | htmr_reva.h | 36 int MXC_HTMR_RevA_Init(mxc_htmr_reva_regs_t *htmr, uint32_t sec, uint8_t ssec); 37 int MXC_HTMR_RevA_Start(mxc_htmr_reva_regs_t *htmr); 38 int MXC_HTMR_RevA_Stop(mxc_htmr_reva_regs_t *htmr); 39 int MXC_HTMR_RevA_GetShortCount(mxc_htmr_reva_regs_t *htmr); 40 int MXC_HTMR_RevA_GetLongCount(mxc_htmr_reva_regs_t *htmr); 41 int MXC_HTMR_RevA_SetLongAlarm(mxc_htmr_reva_regs_t *htmr, uint32_t ras); 42 int MXC_HTMR_RevA_SetShortAlarm(mxc_htmr_reva_regs_t *htmr, uint32_t rssa); 43 int MXC_HTMR_RevA_CheckBusy(mxc_htmr_reva_regs_t *htmr); 44 int MXC_HTMR_RevA_GetFlags(mxc_htmr_reva_regs_t *htmr); 45 int MXC_HTMR_RevA_ClearFlags(mxc_htmr_reva_regs_t *htmr, int flags); [all …]
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| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Include/MAX32572/ |
| D | htmr.h | 73 int MXC_HTMR_EnableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 82 int MXC_HTMR_DisableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 90 int MXC_HTMR_SetLongAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 98 int MXC_HTMR_SetShortAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 105 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr); 112 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr); 121 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval); 128 int MXC_HTMR_CheckBusy(mxc_htmr_regs_t *htmr); 137 int MXC_HTMR_GetFlags(mxc_htmr_regs_t *htmr); 146 int MXC_HTMR_ClearFlags(mxc_htmr_regs_t *htmr, int flags); [all …]
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| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Include/MAX32570/ |
| D | htmr.h | 73 int MXC_HTMR_EnableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 82 int MXC_HTMR_DisableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 90 int MXC_HTMR_SetLongAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 98 int MXC_HTMR_SetShortAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 105 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr); 112 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr); 121 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval); 128 int MXC_HTMR_CheckBusy(mxc_htmr_regs_t *htmr); 137 int MXC_HTMR_GetFlags(mxc_htmr_regs_t *htmr); 146 int MXC_HTMR_ClearFlags(mxc_htmr_regs_t *htmr, int flags); [all …]
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| /hal_adi-latest/MAX/Libraries/PeriphDrivers/Include/MAX32665/ |
| D | htmr.h | 74 int MXC_HTMR_EnableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 83 int MXC_HTMR_DisableInt(mxc_htmr_regs_t *htmr, uint32_t mask); 91 int MXC_HTMR_SetLongAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 99 int MXC_HTMR_SetShortAlarm(mxc_htmr_regs_t *htmr, uint32_t interval); 106 int MXC_HTMR_Start(mxc_htmr_regs_t *htmr); 113 int MXC_HTMR_Stop(mxc_htmr_regs_t *htmr); 122 int MXC_HTMR_Init(mxc_htmr_regs_t *htmr, uint32_t longInterval, uint8_t shortInterval); 129 int MXC_HTMR_CheckBusy(mxc_htmr_regs_t *htmr); 138 int MXC_HTMR_GetFlags(mxc_htmr_regs_t *htmr); 147 int MXC_HTMR_ClearFlags(mxc_htmr_regs_t *htmr, int flags); [all …]
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