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/cmsis-dsp-latest/Source/ComplexMathFunctions/
Darm_cmplx_conj_f32.c130 float32x4_t zero; in arm_cmplx_conj_f32() local
133 zero = vdupq_n_f32(0.0f); in arm_cmplx_conj_f32()
143 vec.val[1] = vsubq_f32(zero,vec.val[1]); in arm_cmplx_conj_f32()
Darm_cmplx_conj_q31.c63 q31x4_t zero; in arm_cmplx_conj_q31() local
65 zero = vdupq_n_s32(0); in arm_cmplx_conj_q31()
75 vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); in arm_cmplx_conj_q31()
Darm_cmplx_conj_q15.c63 q15x8_t zero; in arm_cmplx_conj_q15() local
65 zero = vdupq_n_s16(0); in arm_cmplx_conj_q15()
72 vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]); in arm_cmplx_conj_q15()
/cmsis-dsp-latest/Examples/cmsis_build/RTE/Device/SSE-310-MPS3/
Dcorstone310_mps3_s.sct28 /* This empty, zero long execution region is here to mark the limit address
50 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-latest/dsppp/RTE/Device/SSE-300-MPS3/
Dlinker_SSE300MPS3_secure.sct.base@1.1.028 /* This empty, zero long execution region is here to mark the limit address
53 /* This empty, zero long execution region is here to mark the limit address
Dlinker_SSE300MPS3_secure.sct28 /* This empty, zero long execution region is here to mark the limit address
53 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/SSE-300-MPS3/
Dlinker_SSE300MPS3_secure.sct28 /* This empty, zero long execution region is here to mark the limit address
53 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-latest/Source/MatrixFunctions/
Darm_mat_ldlt_f32.c249 f32x4_t zero=vdupq_n_f32(0.0f); in arm_mat_ldlt_f32() local
255 vstrwq_p(&pl->pData[row*n+col], zero, p0); in arm_mat_ldlt_f32()
266 f32x4_t zero=vdupq_n_f32(0.0f); in arm_mat_ldlt_f32() local
272 vstrwq_p(&pl->pData[row*n+col], zero, p0); in arm_mat_ldlt_f32()
/cmsis-dsp-latest/dsppp/linker_scripts/
Dac6_sse310_mps3_s.sct29 /* This empty, zero long execution region is here to mark the limit address
51 /* This empty, zero long execution region is here to mark the limit address
Dgcc_m0p_mps3.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
247 * to the .zero.table above to assure proper
Dgcc_sse300_mps3.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
248 * to the .zero.table above to assure proper
Dgcc_sse310_mps3_s.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
248 * to the .zero.table above to assure proper
Dgcc_m4_mps3.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
247 * to the .zero.table above to assure proper
/cmsis-dsp-latest/Testing/cmsis_build/linker_scripts/
Dac6_sse310_mps3_s.sct29 /* This empty, zero long execution region is here to mark the limit address
51 /* This empty, zero long execution region is here to mark the limit address
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4/
DARMCM4_gcc.ld133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
DARMCM0plus_gcc.ld.base@2.2.0133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
Dgcc_linker_script.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
247 * to the .zero.table above to assure proper
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM4/
DARMCM4_gcc.ld133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
DARMCM4_gcc.ld.base@2.2.0133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7/
DARMCM7_gcc.ld133 .zero.table :
138 /* .bss initialization to zero is already done during C Run-Time Startup.
226 * to the .zero.table above to assure proper
/cmsis-dsp-latest/Source/FilteringFunctions/
Darm_biquad_cascade_df1_q15.c89 uint32_t zero = 0; in arm_biquad_cascade_df1_q15() local
91 bCoeffs1 = vshlcq_s16(bCoeffs1, &zero, 16); in arm_biquad_cascade_df1_q15()
94 bCoeffs2 = vshlcq_s16(bCoeffs2, &zero, 16); in arm_biquad_cascade_df1_q15()
97 bCoeffs3 = vshlcq_s16(bCoeffs3, &zero, 16); in arm_biquad_cascade_df1_q15()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33/
DARMCM33_gcc.ld152 .zero.table :
157 /* .bss initialization to zero is already done during C Run-Time Startup.
245 * to the .zero.table above to assure proper
/cmsis-dsp-latest/dsppp/RTE/Device/SSE_300_MPS3/
Dgcc_linker_script.ld154 .zero.table :
159 /* .bss initialization to zero is already done during C Run-Time Startup.
247 * to the .zero.table above to assure proper

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