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/cmsis-dsp-latest/Examples/cmsis_build/
Drunall.bat4 -C cpu0.semihosting-enable=1 ^
11 -C cpu0.semihosting-enable=1 ^
18 -C cpu0.semihosting-enable=1 ^
25 -C cpu0.semihosting-enable=1 ^
32 -C cpu0.semihosting-enable=1 ^
39 -C cpu0.semihosting-enable=1 ^
46 -C cpu0.semihosting-enable=1 ^
53 -C cpu0.semihosting-enable=1 ^
60 -C cpu0.semihosting-enable=1 ^
67 -C cpu0.semihosting-enable=1 ^
[all …]
/cmsis-dsp-latest/Documentation/Doxygen/style_template/
Ddarkmode_toggle.js235 static setDarkModeVisibility(enable) { argument
237 if(enable) {
251 static enableDarkMode(enable) { argument
252 if(enable) {
261 DarkModeToggle.setDarkModeVisibility(enable)
/cmsis-dsp-latest/Testing/cmsis_build/configs/
DARMCA5neon_config.txt7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 …enable=0 # (bool , init-time) default = '0' : Enable semihosting HLT traps. …
DARMCA9neon_config.txt7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 …enable=0 # (bool , init-time) default = '0' : Enable semihosting HLT traps. …
DARMCA7neon_config.txt7 cluster.cpu0.semihosting-enable=1 # (bool , init-time) default = '1' : En…
8 …enable=0 # (bool , init-time) default = '0' : Enable semihosting HLT traps. …
DARM_VHT_Corstone_300_config.txt4 cpu0.semihosting-enable=1
DARM_VHT_Corstone_300_config_ext.txt4 cpu0.semihosting-enable=1
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM4/
Dsystem_ARMCM4.c.base@2.0.070 SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
71 (3U << 11U*2U) ); /* enable CP11 Full Access */
/cmsis-dsp-latest/dsppp/RTE/Device/SSE-300-MPS3/
Dsystem_SSE300MPS3.c.base@1.1.164 SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
65 (3U << 11U*2U) ); /* enable CP11 Full Access */
/cmsis-dsp-latest/dsppp/fvp_configs/
DVHT-M0P.txt2 armcortexm0plusct.semihosting-enable=1
DVHT-M4.txt2 armcortexm4ct.semihosting-enable=1
DVHT-Corstone-300.txt2 cpu0.semihosting-enable=1
/cmsis-dsp-latest/Examples/ARM/arm_bayes_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_class_marks_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_convolution_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_svm_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_fir_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_sin_cos_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_dotproduct_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_fft_bin_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_signal_converge_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_variance_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_graphic_equalizer_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_linear_interp_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…
/cmsis-dsp-latest/Examples/ARM/arm_matrix_example/
DARMCM55_FP_MVE_config.txt4 cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : En…
15 #cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : E…

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