Home
last modified time | relevance | path

Searched refs:__ROM_SIZE (Results 1 – 24 of 24) sorted by relevance

/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA5/
DARMCA5.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
Dmem_ARMCA5.h47 #define __ROM_SIZE 0x00200000 macro
Dmmu_ARMCA5.c171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA7/
DARMCA7.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
Dmem_ARMCA7.h47 #define __ROM_SIZE 0x00200000 macro
Dmmu_ARMCA7.c171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA9/
DARMCA9.sct14 SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
16 VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
Dmem_ARMCA9.h47 #define __ROM_SIZE 0x00200000 macro
Dmmu_ARMCA9.c171 …MMU_TTSection (TTB_BASE, __ROM_BASE, __ROM_SIZE/0x100000, Sect_Normal_Cod); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
62 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4/
DARMCM4_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
DARMCM0plus_gcc.ld.base@2.2.012 __ROM_SIZE = 0x00040000;
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM4/
DARMCM4_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
DARMCM4_gcc.ld.base@2.2.012 __ROM_SIZE = 0x00040000;
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7/
DARMCM7_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
38 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33/
DARMCM33_gcc.ld12 __ROM_SIZE = 0x00040000; symbol
44 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM3/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
62 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4_FP/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
62 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7_DP/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
62 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM23/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
68 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33_DSP_FP/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
68 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM55/
Dgcc_arm.ld36 __ROM_SIZE = 0x00100000; symbol
68 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE