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Searched refs:__RAM_SIZE (Results 1 – 24 of 24) sorted by relevance

/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA5/
DARMCA5.sct37 +__RAM_SIZE
46 +__RAM_SIZE
54 +__RAM_SIZE
61 +__RAM_SIZE
67 +__RAM_SIZE
72 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
Dmem_ARMCA5.h72 #define __RAM_SIZE 0x00300000 macro
Dmmu_ARMCA5.c172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA7/
DARMCA7.sct37 +__RAM_SIZE
46 +__RAM_SIZE
54 +__RAM_SIZE
61 +__RAM_SIZE
67 +__RAM_SIZE
72 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
Dmem_ARMCA7.h72 #define __RAM_SIZE 0x00300000 macro
Dmmu_ARMCA7.c172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCA9/
DARMCA9.sct37 +__RAM_SIZE
46 +__RAM_SIZE
54 +__RAM_SIZE
61 +__RAM_SIZE
67 +__RAM_SIZE
72 +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
Dmem_ARMCA9.h72 #define __RAM_SIZE 0x00300000 macro
Dmmu_ARMCA9.c172 …MMU_TTSection (TTB_BASE, __RAM_BASE, __RAM_SIZE/0x100000, Sect_Normal_RW); // multiple of 1MB sec… in MMU_CreateTranslationTable()
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
63 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4/
DARMCM4_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM0P/
DARMCM0plus_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
DARMCM0plus_gcc.ld.base@2.2.021 __RAM_SIZE = 0x00020000;
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/dsppp/RTE/Device/ARMCM4/
DARMCM4_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
DARMCM4_gcc.ld.base@2.2.021 __RAM_SIZE = 0x00020000;
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7/
DARMCM7_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
39 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33/
DARMCM33_gcc.ld21 __RAM_SIZE = 0x00020000; symbol
45 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM3/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
63 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM4_FP/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
63 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM7_DP/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
63 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM23/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
69 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM33_DSP_FP/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
69 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
/cmsis-dsp-latest/Testing/cmsis_build/RTE/Device/ARMCM55/
Dgcc_arm.ld45 __RAM_SIZE = 0x00300000; symbol
69 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE