Searched refs:__DMB (Results 1 – 14 of 14) sorted by relevance
132 __DMB(); in ARM_MPU_Enable()145 __DMB(); in ARM_MPU_Disable()160 __DMB(); in ARM_MPU_Enable_NS()173 __DMB(); in ARM_MPU_Disable_NS()
193 __DMB(); in ARM_MPU_Enable()206 __DMB(); in ARM_MPU_Disable()
189 #define __DMB() __dmb(0xF) macro
223 #define __DMB() __builtin_arm_dmb(0xF) macro
424 #define __DMB __iar_builtin_DMB macro
221 #define __DMB() __builtin_arm_dmb(0xF) macro
280 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
953 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanDCacheMVA()961 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_InvalidateDCacheMVA()969 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanInvalidateDCacheMVA()1042 __DMB(); in __L1C_MaintainDCacheSetWay()
373 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
139 #define __DMB() __builtin_arm_dmb(0xF) macro
897 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanDCacheMVA()905 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_InvalidateDCacheMVA()913 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanInvalidateDCacheMVA()986 __DMB(); in __L1C_MaintainDCacheSetWay()
127 #define __DMB() __dmb(0xF) macro
283 #define __DMB __iar_builtin_DMB macro
374 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
