Searched refs:tx_dma (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/drivers/serial/ |
| D | uart_mcux_flexcomm.c | 47 struct mcux_flexcomm_uart_dma_config tx_dma; member
424 if (config->tx_dma.dev == NULL) { in mcux_flexcomm_uart_tx()
433 ret = dma_get_status(config->tx_dma.dev, config->tx_dma.channel, &status); in mcux_flexcomm_uart_tx()
457 ret = dma_config(config->tx_dma.dev, config->tx_dma.channel, in mcux_flexcomm_uart_tx()
458 (struct dma_config *) &config->tx_dma.cfg); in mcux_flexcomm_uart_tx()
471 ret = dma_start(config->tx_dma.dev, config->tx_dma.channel); in mcux_flexcomm_uart_tx()
509 ret = dma_get_status(config->tx_dma.dev, config->tx_dma.channel, &status); in mcux_flexcomm_uart_tx_abort()
515 ret = dma_stop(config->tx_dma.dev, config->tx_dma.channel); in mcux_flexcomm_uart_tx_abort()
891 config->tx_dma.dev == NULL) { in flexcomm_uart_async_init()
896 !device_is_ready(config->tx_dma.dev)) { in flexcomm_uart_async_init()
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_max32.c | 48 struct max32_i2c_dma_config tx_dma; member
315 dma_cfg.dma_slot = config->tx_dma.slot; in i2c_max32_tx_dma_load()
325 ret = dma_config(config->tx_dma.dev, config->tx_dma.channel, &dma_cfg); in i2c_max32_tx_dma_load()
330 return dma_start(config->tx_dma.dev, config->tx_dma.channel); in i2c_max32_tx_dma_load()
417 dma_stop(cfg->tx_dma.dev, cfg->tx_dma.channel); in i2c_max32_transfer_dma()
599 if ((cfg->tx_dma.channel != 0xFF) && (cfg->rx_dma.channel != 0xFF)) { in api_transfer()
817 if ((cfg->tx_dma.channel != 0xFF) && (cfg->rx_dma.channel != 0xFF)) { in i2c_max32_isr()
924 .tx_dma.dev = MAX32_DT_INST_DMA_CTLR(n, tx), \
925 .tx_dma.channel = MAX32_DT_INST_DMA_CELL(n, tx, channel), \
926 .tx_dma.slot = MAX32_DT_INST_DMA_CELL(n, tx, slot),
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| /Zephyr-latest/drivers/spi/ |
| D | spi_max32.c | 47 struct max32_spi_dma_config tx_dma; member
442 if (channel == config->tx_dma.channel) { in spi_max32_dma_callback()
468 dma_cfg.dma_slot = config->tx_dma.slot; in spi_max32_tx_dma_load()
483 ret = dma_config(config->tx_dma.dev, config->tx_dma.channel, &dma_cfg); in spi_max32_tx_dma_load()
488 return dma_start(config->tx_dma.dev, config->tx_dma.channel); in spi_max32_tx_dma_load()
542 ret = dma_get_status(cfg->tx_dma.dev, cfg->tx_dma.channel, &status); in transceive_dma()
724 if (cfg->tx_dma.channel != 0xFF && cfg->rx_dma.channel != 0xFF) { in api_transceive()
938 .tx_dma.dev = MAX32_DT_INST_DMA_CTLR(n, tx), \
939 .tx_dma.channel = MAX32_DT_INST_DMA_CELL(n, tx, channel), \
940 .tx_dma.slot = MAX32_DT_INST_DMA_CELL(n, tx, slot), \
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