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Searched refs:reg_num (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dxtensa.py190 reg_num = r.value
195 self.registers[reg_num] = 0
197 self.registers[reg_num] = 1
201 self.registers[reg_num] = tu[i]
226 max([reg_num.value for reg_num in self.gdb_reg_def.RegNum])
/Zephyr-latest/drivers/flash/
Dflash_nxp_s32_qspi_nor.c380 uint8_t reg_num, in nxp_s32_qspi_read_status_register() argument
388 switch (reg_num) { in nxp_s32_qspi_read_status_register()
396 LOG_ERR("Reading SR%u is not supported", reg_num); in nxp_s32_qspi_read_status_register()
404 LOG_ERR("Failed to read SR%u (%d)", reg_num, status); in nxp_s32_qspi_read_status_register()
434 uint8_t reg_num, in nxp_s32_qspi_write_status_register() argument
445 if (reg_num == 1) { in nxp_s32_qspi_write_status_register()
459 } else if (reg_num == 2) { in nxp_s32_qspi_write_status_register()
489 LOG_ERR("Failed to write to SR%u (%d)", reg_num, status); in nxp_s32_qspi_write_status_register()
Dflash_stm32_qspi.c983 static int qspi_read_status_register(const struct device *dev, uint8_t reg_num, uint8_t *reg) in qspi_read_status_register() argument
990 switch (reg_num) { in qspi_read_status_register()
1007 static int qspi_write_status_register(const struct device *dev, uint8_t reg_num, uint8_t reg) in qspi_write_status_register() argument
1021 if (reg_num == 1) { in qspi_write_status_register()
1033 } else if (reg_num == 2) { in qspi_write_status_register()
1050 } else if (reg_num == 3) { in qspi_write_status_register()
Dflash_stm32_xspi.c1607 static int stm32_xspi_read_status_register(const struct device *dev, uint8_t reg_num, uint8_t *reg) in stm32_xspi_read_status_register() argument
1614 switch (reg_num) { in stm32_xspi_read_status_register()
1631 static int stm32_xspi_write_status_register(const struct device *dev, uint8_t reg_num, uint8_t reg) in stm32_xspi_write_status_register() argument
1644 if (reg_num == 1U) { in stm32_xspi_write_status_register()
1656 } else if (reg_num == 2U) { in stm32_xspi_write_status_register()
1673 } else if (reg_num == 3U) { in stm32_xspi_write_status_register()
Dflash_stm32_ospi.c1770 static int stm32_ospi_read_status_register(const struct device *dev, uint8_t reg_num, uint8_t *reg) in stm32_ospi_read_status_register() argument
1777 switch (reg_num) { in stm32_ospi_read_status_register()
1794 static int stm32_ospi_write_status_register(const struct device *dev, uint8_t reg_num, uint8_t reg) in stm32_ospi_write_status_register() argument
1807 if (reg_num == 1U) { in stm32_ospi_write_status_register()
1819 } else if (reg_num == 2U) { in stm32_ospi_write_status_register()
1836 } else if (reg_num == 3U) { in stm32_ospi_write_status_register()
/Zephyr-latest/drivers/video/
Dgc2145.c764 uint16_t reg_num) in gc2145_write_all() argument
768 for (uint16_t i = 0; i < reg_num; i++) { in gc2145_write_all()
Dov7725.c375 uint16_t reg_num) in ov7725_write_all() argument
380 for (i = 0; i < reg_num; i++) { in ov7725_write_all()
Dov2640.c529 const struct ov2640_reg *regs, uint16_t reg_num) in ov2640_write_all() argument
534 for (i = 0; i < reg_num; i++) { in ov2640_write_all()