Searched refs:rail (Results 1 – 19 of 19) sorted by relevance
9 int "CCS_VDD power rail init priority"13 Initialization priority for the CCS_VDD power rail. This powers the
53 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected62 to the VBAT rail via a 100K pull-up. Requires VBAT power rail is connected
16 # Required to enable 3V3 power rail and Vin1 monitor
22 # Required to enable 3V3 power rail
25 # Required to enable 3V3 power rail
181 enum da1469x_rail rail; member288 if ((SystemCoreClock == PLL_FREQ) && (config->rail == VDD)) { in regulator_da1469x_set_voltage()403 if ((config->rail == V30) && in regulator_da1469x_init()464 .rail = rail_id, \
59 bool "GPIO monitor for sensing power on rail"
119 * rather than a positive voltage rail to save on power. This will enable
121 * rail to save on power. This will enable the LED on board initialization.
72 * rail to save on power. This will enable the LED on board initialization.
33 bool "VTR3 power rail is tied to 1.8V"
58 * PWR rail for SPI-flash, Temp-Sensor, RS-485 Transceiver,
47 # rail
63 - 4x ultra-fast rail-to-rail analog comparators
69 # rail
66 regulator driving the VDDCORE rail at 1.0V. However, the MCU will not be
168 - **TSV912** wide-bandwidth (8 MHz) rail-to-rail I/O op-amp
178 ``JP20 2-3`` is required so all GPIOs powered by VTR3 rail worked at 1.8V.
