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Searched refs:psr (Results 1 – 17 of 17) sorted by relevance

/Zephyr-latest/drivers/timer/
Drv32m1_lptmr_timer.c76 uint32_t csr, psr, sircdiv; /* LPTMR registers */ in sys_clock_driver_init() local
123 psr = SYSTEM_TIMER_INSTANCE->PSR; in sys_clock_driver_init()
124 psr &= ~LPTMR_PSR_PCS_MASK; in sys_clock_driver_init()
125 psr |= (LPTMR_PSR_PBYP(1) | LPTMR_PSR_PCS(PCS_SOURCE_SIRCDIV3)); in sys_clock_driver_init()
126 SYSTEM_TIMER_INSTANCE->PSR = psr; in sys_clock_driver_init()
/Zephyr-latest/arch/sparc/core/
Dthread.c47 thread->callee_saved.psr = PSR_S | PSR_PS | PSR_ET; in arch_new_thread()
52 thread->callee_saved.psr |= PSR_EF; in arch_new_thread()
56 thread->callee_saved.psr |= PSR_EF; in arch_new_thread()
Dswitch.S46 rd %psr, %o4
51 wr %g1, %psr /* disable traps */
90 wr %g1, %psr /* restore cwp */
142 wr %g1, %psr /* restore status register and ET */
Dinterrupt_trap.S143 wr %l6, PSR_ET, %psr
204 wr %l6, %l5, %psr
275 rd %psr, %l3
279 mov %l0, %psr
326 wr %l0, %psr
Dsw_trap_set_pil.S34 wr %l5, %psr
Dreset_trap.S30 wr PSR_PIL | PSR_S | PSR_PS | PSR_ET, %psr
Dtrap_table_mvt.S17 rd %psr, %l0; \
23 rd %psr, %l0; \
29 rd %psr, %l0; \
Dfault_trap.S100 wr %o2, PSR_ET, %psr
Dfatal.c166 esf->psr, esf->wim, esf->tbr, esf->y in print_special_registers()
Dtrap_table_svt.S38 rd %psr, %l0
Dwindow_trap.S150 wr %g3, %psr
/Zephyr-latest/arch/sparc/core/offsets/
Doffsets.c21 GEN_OFFSET_SYM(_callee_saved_t, psr);
37 GEN_OFFSET_STRUCT(arch_esf, psr);
/Zephyr-latest/include/zephyr/arch/sparc/
Dexception.h20 uint32_t psr; member
Dthread.h34 uint32_t psr; member
/Zephyr-latest/drivers/sensor/infineon/dps310/
Ddps310.c439 float psr = ((float)psr_raw) / IFX_DPS310_SF_PSR; in dps310_scale_pressure() local
445 psr_final += psr * (comp->c10 + psr * (comp->c20 + psr * comp->c30)); in dps310_scale_pressure()
447 psr_final += tmp * psr * (comp->c11 + psr * comp->c21); in dps310_scale_pressure()
/Zephyr-latest/drivers/i2c/
Di2c_ite_enhance.c299 uint32_t clk_div, psr, pll_clock, psr_h, psr_l; in i2c_enhanced_port_set_frequency() local
317 psr = (pll_clock / (clk_div * (2U * freq_hz))) - 2U; in i2c_enhanced_port_set_frequency()
319 if (psr > 0xFD) { in i2c_enhanced_port_set_frequency()
320 psr = 0xFD; in i2c_enhanced_port_set_frequency()
324 psr_l = psr + prescale_scl; in i2c_enhanced_port_set_frequency()
335 if (psr > (prescale_scl + 2)) { in i2c_enhanced_port_set_frequency()
336 psr_h = psr - prescale_scl; in i2c_enhanced_port_set_frequency()
/Zephyr-latest/drivers/display/
Duc81xx.c198 uint8_t psr = in uc81xx_set_profile() local
237 psr |= UC81XX_PSR_REG; in uc81xx_set_profile()
242 LOG_DBG("PSR: %#hhx", psr); in uc81xx_set_profile()
243 if (uc81xx_write_cmd_uint8(dev, UC81XX_CMD_PSR, psr)) { in uc81xx_set_profile()