| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/src/ |
| D | test_stm32_clock_configuration.c | 67 uint32_t pll_src = __HAL_RCC_GET_PLL_OSCSOURCE(); in ZTEST() local
70 zassert_equal(RCC_PLLSOURCE_HSE, pll_src, in ZTEST()
72 RCC_PLLSOURCE_HSE, pll_src); in ZTEST()
75 zassert_equal(RCC_PLLSOURCE_HSI_DIV2, pll_src, in ZTEST()
77 RCC_PLLSOURCE_HSI_DIV2, pll_src); in ZTEST()
79 zassert_equal(RCC_PLLSOURCE_HSI, pll_src, in ZTEST()
81 RCC_PLLSOURCE_HSI, pll_src); in ZTEST()
84 zassert_equal(RCC_PLLSOURCE_MSI, pll_src, in ZTEST()
86 RCC_PLLSOURCE_MSI, pll_src); in ZTEST()
96 pll_src = 0xFFFF; /* error code */ in ZTEST()
[all …]
|
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core/src/ |
| D | test_stm32_clock_configuration.c | 58 uint32_t pll_src = __HAL_RCC_GET_PLL_OSCSOURCE(); in ZTEST() local
61 zassert_equal(RCC_PLLSOURCE_HSE, pll_src, in ZTEST()
63 pll_src); in ZTEST()
65 zassert_equal(RCC_PLLSOURCE_HSI, pll_src, in ZTEST()
67 pll_src); in ZTEST()
69 zassert_equal(RCC_PLLSOURCE_MSI, pll_src, in ZTEST()
71 pll_src); in ZTEST()
73 zassert_equal(RCC_PLLSOURCE_NONE, pll_src, in ZTEST()
75 pll_src); in ZTEST()
|
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/ |
| D | test_stm32_clock_configuration.c | 58 uint32_t pll_src = __HAL_RCC_GET_PLL_OSCSOURCE(); in ZTEST() local
61 zassert_equal(RCC_PLLSOURCE_HSE, pll_src, in ZTEST()
63 pll_src); in ZTEST()
65 zassert_equal(RCC_PLLSOURCE_HSI, pll_src, in ZTEST()
67 pll_src); in ZTEST()
69 zassert_equal(RCC_PLLSOURCE_CSI, pll_src, in ZTEST()
71 pll_src); in ZTEST()
73 zassert_equal(RCC_PLLSOURCE_NONE, pll_src, in ZTEST()
75 pll_src); in ZTEST()
|
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/src/ |
| D | test_stm32_clock_configuration.c | 58 uint32_t pll_src = __HAL_RCC_GET_PLL_OSCSOURCE(); in ZTEST() local
61 zassert_equal(RCC_PLLSOURCE_HSE, pll_src, in ZTEST()
63 RCC_PLLSOURCE_HSE, pll_src); in ZTEST()
65 zassert_equal(RCC_PLLSOURCE_HSI, pll_src, in ZTEST()
67 RCC_PLLSOURCE_HSI, pll_src); in ZTEST()
69 zassert_equal(RCC_PLLSOURCE_CSI, pll_src, in ZTEST()
71 RCC_PLLSOURCE_CSI, pll_src); in ZTEST()
73 zassert_equal(RCC_PLLSOURCE_NONE, pll_src, in ZTEST()
75 RCC_PLLSOURCE_NONE, pll_src); in ZTEST()
|
| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32wba_core/src/ |
| D | test_stm32_clock_configuration.c | 53 uint32_t pll_src = __HAL_RCC_GET_PLL1_OSCSOURCE(); in ZTEST() local
56 zassert_equal(RCC_PLLSOURCE_HSE, pll_src, in ZTEST()
58 pll_src); in ZTEST()
60 zassert_equal(RCC_PLLSOURCE_HSI, pll_src, in ZTEST()
62 pll_src); in ZTEST()
64 zassert_equal(RCC_PLLSOURCE_NONE, pll_src, in ZTEST()
66 pll_src); in ZTEST()
|
| /Zephyr-latest/include/zephyr/drivers/clock_control/ |
| D | stm32_clock_control.h | 505 #define STM32_IC1_PLL_SRC DT_PROP(DT_NODELABEL(ic1), pll_src)
511 #define STM32_IC2_PLL_SRC DT_PROP(DT_NODELABEL(ic2), pll_src)
517 #define STM32_IC3_PLL_SRC DT_PROP(DT_NODELABEL(ic3), pll_src)
523 #define STM32_IC4_PLL_SRC DT_PROP(DT_NODELABEL(ic4), pll_src)
529 #define STM32_IC5_PLL_SRC DT_PROP(DT_NODELABEL(ic5), pll_src)
535 #define STM32_IC6_PLL_SRC DT_PROP(DT_NODELABEL(ic6), pll_src)
541 #define STM32_IC7_PLL_SRC DT_PROP(DT_NODELABEL(ic7), pll_src)
547 #define STM32_IC8_PLL_SRC DT_PROP(DT_NODELABEL(ic8), pll_src)
553 #define STM32_IC9_PLL_SRC DT_PROP(DT_NODELABEL(ic9), pll_src)
559 #define STM32_IC10_PLL_SRC DT_PROP(DT_NODELABEL(ic10), pll_src)
[all …]
|
| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_mchp_xec.c | 196 enum pll_clk32k_src pll_src; member
668 enum pll_clk32k_src pll_src, in soc_clk32_init() argument
700 if ((pll_src == PLL_CLK32K_SRC_XTAL) || periph_clk_src_using_xtal(periph_src)) { in soc_clk32_init()
716 if (pll_src != PLL_CLK32K_SRC_SO) { in soc_clk32_init()
717 connect_pll_32k(dev, pll_src, flags); in soc_clk32_init()
1027 enum pll_clk32k_src pll_clk_src = devcfg->pll_src; in xec_clock_control_init()
1086 .pll_src = XEC_PLL_32K_SRC(0),
|
| /Zephyr-latest/drivers/i2s/ |
| D | i2s_mcux_sai.c | 92 uint32_t pll_src; member
1080 audioPllConfig.src = dev_cfg->pll_src; in audio_clock_settings()
1180 .pll_src = DT_PHA_BY_NAME_OR(DT_DRV_INST(i2s_id), pll_clocks, src, value, 0), \
|
