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Searched refs:mstp (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_renesas_ra_cgc.c47 WRITE_BIT(*mstp_regs[subsys_clk->mstp], subsys_clk->stop_bit, false); in clock_control_renesas_ra_on()
59 WRITE_BIT(*mstp_regs[subsys_clk->mstp], subsys_clk->stop_bit, true); in clock_control_renesas_ra_off()
/Zephyr-latest/drivers/watchdog/
Dwdt_renesas_ra.c317 .clock_subsys = {.mstp = DT_CLOCKS_CELL(id, mstp), \
/Zephyr-latest/include/zephyr/drivers/clock_control/
Drenesas_ra_cgc.h77 uint32_t mstp; member
/Zephyr-latest/drivers/can/
Dcan_renesas_ra.c1039 .op_subsys = {.mstp = DT_CLOCKS_CELL_BY_NAME(DT_INST(0, renesas_ra_canfd_global), opclk,
1040 mstp),
1043 .ram_subsys = {.mstp = DT_CLOCKS_CELL_BY_NAME(DT_INST(0, renesas_ra_canfd_global), ramclk,
1044 mstp),
1117 .mstp = DT_INST_CLOCKS_CELL_BY_NAME(index, dllclk, mstp), \
/Zephyr-latest/drivers/mipi_dsi/
Ddsi_renesas_ra.c343 .mstp = DT_INST_CLOCKS_CELL(id, mstp), \
/Zephyr-latest/drivers/display/
Ddisplay_renesas_ra.c426 .clock_glcdc_subsys = {.mstp = (uint32_t)DT_INST_CLOCKS_CELL_BY_IDX(id, 0, mstp), \
/Zephyr-latest/drivers/pwm/
Dpwm_renesas_ra.c555 .mstp = (uint32_t)DT_INST_CLOCKS_CELL_BY_IDX(index, 0, mstp), \
/Zephyr-latest/drivers/spi/
Dspi_b_renesas_ra8.c728 .mstp = (uint32_t)DT_INST_CLOCKS_CELL_BY_NAME(index, spiclk, \
729 mstp), \