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Searched refs:mmc_clk_ctl (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/sdhc/
Drcar_mmc.c373 uint32_t mmc_clk_ctl = rcar_mmc_read_reg32(dev, RCAR_MMC_CLKCTL); in rcar_mmc_enable_clock() local
376 mmc_clk_ctl &= ~RCAR_MMC_CLKCTL_OFFEN; in rcar_mmc_enable_clock()
377 mmc_clk_ctl |= RCAR_MMC_CLKCTL_SCLKEN; in rcar_mmc_enable_clock()
379 mmc_clk_ctl |= RCAR_MMC_CLKCTL_OFFEN; in rcar_mmc_enable_clock()
380 mmc_clk_ctl &= ~RCAR_MMC_CLKCTL_SCLKEN; in rcar_mmc_enable_clock()
392 rcar_mmc_write_reg32(dev, RCAR_MMC_CLKCTL, mmc_clk_ctl); in rcar_mmc_enable_clock()
1094 uint32_t mmc_clk_ctl; in rcar_mmc_set_clk_rate() local
1137 mmc_clk_ctl = rcar_mmc_read_reg32(dev, RCAR_MMC_CLKCTL); in rcar_mmc_set_clk_rate()
1138 if ((mmc_clk_ctl & RCAR_MMC_CLKCTL_SCLKEN) && in rcar_mmc_set_clk_rate()
1139 (mmc_clk_ctl & RCAR_MMC_CLKCTL_DIV_MASK) == divisor) { in rcar_mmc_set_clk_rate()
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