Searched refs:ioaddr (Results 1 – 2 of 2) sorted by relevance
56 static inline int dwxgmac_software_reset(mem_addr_t ioaddr) in dwxgmac_software_reset() argument61 mem_addr_t reg_addr = (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_MODE_OFST); in dwxgmac_software_reset()93 mem_addr_t ioaddr = 0; in mdio_transfer() local97 ioaddr = (mem_addr_t)DEVICE_MMIO_GET(dev); in mdio_transfer()98 retval = mdio_busy_wait((ioaddr + CORE_MDIO_SINGLE_COMMAND_CONTROL_DATA_OFST), in mdio_transfer()107 reg_addr = ioaddr + CORE_MDIO_CLAUSE_22_PORT_OFST; in mdio_transfer()112 reg_addr = ioaddr + CORE_MDIO_SINGLE_COMMAND_ADDRESS_OFST; in mdio_transfer()117 reg_addr = ioaddr + CORE_MDIO_SINGLE_COMMAND_CONTROL_DATA_OFST; in mdio_transfer()170 mem_addr_t ioaddr; in mdio_dwcxgmac_initialize() local193 ioaddr = (mem_addr_t)DEVICE_MMIO_GET(dev); in mdio_dwcxgmac_initialize()[all …]
153 mem_addr_t ioaddr = get_reg_base_addr(dev); in dwxgmac_dma_init() local155 (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_SYSBUS_MODE_OFST); in dwxgmac_dma_init()177 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_TX_EDMA_CONTROL_OFST; in dwxgmac_dma_init()184 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_RX_EDMA_CONTROL_OFST; in dwxgmac_dma_init()203 mem_addr_t ioaddr = get_reg_base_addr(dev); in dwxgmac_dma_chnl_init() local214 reg_addr = (ioaddr + XGMAC_DMA_CHNLx_BASE_ADDR_OFFSET(dma_chnl) + in dwxgmac_dma_chnl_init()225 reg_addr = (ioaddr + XGMAC_DMA_CHNLx_BASE_ADDR_OFFSET(dma_chnl) + in dwxgmac_dma_chnl_init()236 reg_addr = (ioaddr + XGMAC_DMA_CHNLx_BASE_ADDR_OFFSET(dma_chnl) + in dwxgmac_dma_chnl_init()244 reg_addr = (ioaddr + XGMAC_DMA_CHNLx_BASE_ADDR_OFFSET(dma_chnl) + in dwxgmac_dma_chnl_init()251 reg_addr = (ioaddr + XGMAC_DMA_CHNLx_BASE_ADDR_OFFSET(dma_chnl) + in dwxgmac_dma_chnl_init()[all …]
