Searched refs:gpt_base (Results 1 – 1 of 1) sorted by relevance
40 const uint32_t gpt_base; /* GPT register base address */ member52 HWREG(config->gpt_base + prescale_register) = prescaleValue; in write_value()55 HWREG(config->gpt_base + value_register) = value & 0xffff; in write_value()64 TimerDisable(config->gpt_base, TIMER_B); in set_period_and_pulse()91 TimerEnable(config->gpt_base, TIMER_B); in set_period_and_pulse()108 HWREG(config->gpt_base + GPT_O_CTL) |= GPT_CTL_TBPWML_INVERTED; in set_cycles()110 HWREG(config->gpt_base + GPT_O_CTL) |= GPT_CTL_TBPWML_NORMAL; in set_cycles()139 switch (config->gpt_base) { in get_timer_inst_number()155 switch (config->gpt_base) { in get_timer_peripheral()214 TimerDisable(config->gpt_base, TIMER_B); in init_pwm()[all …]
