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Searched refs:gpio_config (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/drivers/gpio/
Dgpio_litex.c96 const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); in gpio_litex_configure() local
111 if (!gpio_config->port_is_output) { in gpio_litex_configure()
117 set_bit(gpio_config, pin, GPIO_HIGH); in gpio_litex_configure()
119 set_bit(gpio_config, pin, GPIO_LOW); in gpio_litex_configure()
122 if (gpio_config->port_is_output) { in gpio_litex_configure()
134 const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); in gpio_litex_port_get_raw() local
136 *value = get_port(gpio_config); in gpio_litex_port_get_raw()
144 const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); in gpio_litex_port_set_masked_raw() local
147 port_val = get_port(gpio_config); in gpio_litex_port_set_masked_raw()
149 set_port(gpio_config, port_val); in gpio_litex_port_set_masked_raw()
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Dgpio_ite_it8xxx2_v2.c80 const struct gpio_ite_cfg *gpio_config = dev->config; in gpio_ite_configure() local
81 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_configure()
82 volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr; in gpio_ite_configure()
83 volatile uint8_t *reg_p18scr = (uint8_t *)gpio_config->reg_p18scr; in gpio_ite_configure()
84 volatile uint8_t *reg_gpcr = (uint8_t *)gpio_config->reg_gpcr + pin; in gpio_ite_configure()
129 if (gpio_config->has_volt_sel[pin]) { in gpio_ite_configure()
164 if (gpio_config->kbs_ctrl) { in gpio_ite_configure()
187 if (gpio_config->kbs_ctrl) { in gpio_ite_configure()
227 const struct gpio_ite_cfg *gpio_config = dev->config; in gpio_ite_get_config() local
228 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_get_config()
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Dgpio_cc32xx.c72 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_config() local
73 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_config()
87 MAP_PinTypeGPIO(pinTable[gpio_config->port_num * 8 + pin], in gpio_cc32xx_config()
106 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_get_raw() local
107 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_get_raw()
119 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_set_masked_raw() local
120 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_set_masked_raw()
130 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_set_bits_raw() local
131 unsigned long port_base = gpio_config->port_base; in gpio_cc32xx_port_set_bits_raw()
141 const struct gpio_cc32xx_config *gpio_config = port->config; in gpio_cc32xx_port_clear_bits_raw() local
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Dgpio_ite_it8xxx2.c359 const struct gpio_ite_cfg *gpio_config = DEV_GPIO_CFG(dev); in gpio_ite_configure() local
361 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_configure()
362 volatile uint8_t *reg_gpcr = (uint8_t *)(gpio_config->reg_gpcr + pin); in gpio_ite_configure()
363 volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr; in gpio_ite_configure()
368 __ASSERT(gpio_config->index < GPIO_GROUP_COUNT, in gpio_ite_configure()
387 (gpio_config->index + 'A'), pin); in gpio_ite_configure()
409 gpio_1p8v[gpio_config->index][pin].offset); in gpio_ite_configure()
410 mask_1p8v = gpio_1p8v[gpio_config->index][pin].mask_1p8v; in gpio_ite_configure()
465 const struct gpio_ite_cfg *gpio_config = DEV_GPIO_CFG(dev); in gpio_ite_get_config() local
467 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_get_config()
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Dgpio_renesas_rz.c289 const struct gpio_rz_config *gpio_config = gpio_dev->config; in gpio_rz_int_enable() local
298 *tssr |= (GPIO_RZ_TSSR_VAL(gpio_config->port_num, pin)) << GPIO_RZ_TSSR_OFFSET(tint_num); in gpio_rz_int_enable()
/Zephyr-latest/tests/subsys/pm/device_driver_init/src/
Dmain.c19 gpio_flags_t gpio_config; \
20 int gpio_ret = gpio_pin_get_config_dt(&gpio, &gpio_config); \
22 zassert_equal(gpio_config, config, "Unexpected config");\