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Searched refs:esp_intr_get_enabled_intmask (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/soc/espressif/esp32c6/
Dsoc_irq.c41 res = esp_intr_get_enabled_intmask(0) & BIT(irq); in arch_irq_is_enabled()
43 res = esp_intr_get_enabled_intmask(1) & BIT(irq - 32); in arch_irq_is_enabled()
45 res = esp_intr_get_enabled_intmask(2) & BIT(irq - 64); in arch_irq_is_enabled()
60 esp_intr_get_enabled_intmask(0); in soc_intr_get_next_source()
69 esp_intr_get_enabled_intmask(1); in soc_intr_get_next_source()
78 esp_intr_get_enabled_intmask(2); in soc_intr_get_next_source()
/Zephyr-latest/soc/espressif/esp32c2/
Dsoc_irq.c42 res = esp_intr_get_enabled_intmask(0) & BIT(irq); in arch_irq_is_enabled()
44 res = esp_intr_get_enabled_intmask(1) & BIT(irq - 32); in arch_irq_is_enabled()
58 esp_intr_get_enabled_intmask(0); in soc_intr_get_next_source()
64 esp_intr_get_enabled_intmask(1); in soc_intr_get_next_source()
/Zephyr-latest/soc/espressif/esp32c3/
Dsoc_irq.c42 res = esp_intr_get_enabled_intmask(0) & BIT(irq); in arch_irq_is_enabled()
44 res = esp_intr_get_enabled_intmask(1) & BIT(irq - 32); in arch_irq_is_enabled()
58 esp_intr_get_enabled_intmask(0); in soc_intr_get_next_source()
64 esp_intr_get_enabled_intmask(1); in soc_intr_get_next_source()
/Zephyr-latest/include/zephyr/drivers/interrupt_controller/
Dintc_esp32c3.h119 uint32_t esp_intr_get_enabled_intmask(int status_mask_number);
/Zephyr-latest/drivers/interrupt_controller/
Dintc_esp32c3.c286 uint32_t esp_intr_get_enabled_intmask(int status_mask_number) in esp_intr_get_enabled_intmask() function