Searched refs:dt_attr (Results 1 – 9 of 9) sorted by relevance
15 .dt_attr = DT_PROP(node_id, zephyr_memory_attr), \55 return (region->dt_attr & attr) == attr ? 0 : -EINVAL; in mem_attr_check_buf()
123 sw_attr = DT_MEM_SW_ATTR_GET(regions[idx].dt_attr); in mem_attr_heap_pool_init()
26 zassert_equal(region[idx].dt_attr, DT_MEM_ARM_MPU_FLASH | in ZTEST()34 zassert_equal(region[idx].dt_attr, DT_MEM_ARM_MPU_RAM_NOCACHE, in ZTEST()
64 uint32_t dt_attr; member
25 .dt_attr = DT_PROP(node_id, zephyr_memory_attr), \39 uint32_t dt_attr; member73 return (IS_ENABLED(CONFIG_DCACHE) && (region->dt_attr & DT_MEM_CACHEABLE)); in is_region_cacheable()
70 static inline enum shared_multi_heap_attr mpu_to_reg_attr(uint32_t dt_attr) in mpu_to_reg_attr() argument86 switch (DT_MEM_ARM_GET(dt_attr)) { in mpu_to_reg_attr()
109 switch (DT_MEM_ARM_GET(region[idx].dt_attr)) { in mpu_configure_regions_from_dt()116 __ASSERT(!(region[idx].dt_attr & DT_MEM_CACHEABLE), in mpu_configure_regions_from_dt()
168 switch (DT_MEM_ARM_GET(region[idx].dt_attr)) { in mpu_configure_regions_from_dt()
213 switch (DT_MEM_ARM_GET(region[idx].dt_attr)) { in mpu_configure_regions_from_dt()220 __ASSERT(!(region[idx].dt_attr & DT_MEM_CACHEABLE), in mpu_configure_regions_from_dt()
