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Searched refs:dma_slot (Results 1 – 25 of 76) sorted by relevance

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/Zephyr-latest/drivers/display/
Ddisplay_mcux_elcdif.c155 pxp_dma.dma_slot = DMA_MCUX_PXP_FMT(DMA_MCUX_PXP_FMT_RGB565); in mcux_elcdif_write()
157 pxp_dma.dma_slot = DMA_MCUX_PXP_FMT(DMA_MCUX_PXP_FMT_RGB888); in mcux_elcdif_write()
159 pxp_dma.dma_slot = DMA_MCUX_PXP_FMT(DMA_MCUX_PXP_FMT_ARGB8888); in mcux_elcdif_write()
165 pxp_dma.dma_slot |= DMA_MCUX_PXP_CMD(DMA_MCUX_PXP_CMD_ROTATE_90); in mcux_elcdif_write()
167 pxp_dma.dma_slot |= DMA_MCUX_PXP_CMD(DMA_MCUX_PXP_CMD_ROTATE_180); in mcux_elcdif_write()
169 pxp_dma.dma_slot |= DMA_MCUX_PXP_CMD(DMA_MCUX_PXP_CMD_ROTATE_270); in mcux_elcdif_write()
171 pxp_dma.dma_slot |= DMA_MCUX_PXP_CMD(DMA_MCUX_PXP_CMD_ROTATE_0); in mcux_elcdif_write()
/Zephyr-latest/drivers/dma/
Ddma_sam0.c83 if (config->dma_slot >= DMAC_TRIG_NUM) { in dma_sam0_config()
111 DMAC_CHCTRLB_TRIGSRC(config->dma_slot); in dma_sam0_config()
115 DMAC_CHCTRLB_TRIGSRC(config->dma_slot); in dma_sam0_config()
145 DMAC_CHCTRLA_TRIGSRC(config->dma_slot); in dma_sam0_config()
150 DMAC_CHCTRLA_TRIGSRC(config->dma_slot); in dma_sam0_config()
Ddma_emul.c150 cfg->dma_slot, cfg->channel_direction, cfg->complete_callback_en, in dma_emul_xfer_config_to_string()
235 xfer_config.dma_slot + i], in dma_emul_work_handler()
306 if (xfer_config->dma_slot >= config->num_requests) { in dma_emul_config_valid()
307 LOG_ERR("invalid dma_slot %u", xfer_config->dma_slot); in dma_emul_config_valid()
371 block_idx = channel * config->num_requests + xfer_config->dma_slot; in dma_emul_configure()
373 block = &config->block[channel * config->num_requests + xfer_config->dma_slot]; in dma_emul_configure()
Ddma_mcux_lpc.c689 if (config->dma_slot) { in dma_mcux_lpc_configure()
693 if (config->dma_slot & LPC_DMA_PERIPH_REQ_EN) { in dma_mcux_lpc_configure()
696 if (config->dma_slot & LPC_DMA_HWTRIG_EN) { in dma_mcux_lpc_configure()
699 if (config->dma_slot & LPC_DMA_TRIGTYPE_LEVEL) { in dma_mcux_lpc_configure()
702 if (config->dma_slot & LPC_DMA_TRIGPOL_HIGH_RISING) { in dma_mcux_lpc_configure()
705 if (config->dma_slot & LPC_DMA_TRIGBURST) { in dma_mcux_lpc_configure()
708 LPC_DMA_GET_BURSTPOWER(config->dma_slot)); in dma_mcux_lpc_configure()
Ddma_mcux_pxp.c70 switch ((config->dma_slot & DMA_MCUX_PXP_CMD_MASK) >> DMA_MCUX_PXP_CMD_SHIFT) { in dma_mcux_pxp_configure()
86 switch ((config->dma_slot & DMA_MCUX_PXP_FMT_MASK) >> DMA_MCUX_PXP_FMT_SHIFT) { in dma_mcux_pxp_configure()
Ddma_intel_adsp_gpdma.c90 uint32_t channel, uint32_t dma_slot) in intel_adsp_gpdma_llp_config() argument
96 GPDMA_CHLLPC_DHRS(dma_slot)); in intel_adsp_gpdma_llp_config()
160 LOG_DBG("%s: channel %d configuring llp for %x", dev->name, channel, cfg->dma_slot); in intel_adsp_gpdma_config()
161 intel_adsp_gpdma_llp_config(dev, channel, cfg->dma_slot); in intel_adsp_gpdma_config()
Ddma_stm32.c458 if (config->dma_slot >= 8) { in dma_stm32_configure()
463 if (config->dma_slot >= 8) { in dma_stm32_configure()
465 config->dma_slot = 0; in dma_stm32_configure()
469 DMA_InitStruct.Channel = dma_stm32_slot_to_channel(config->dma_slot); in dma_stm32_configure()
491 DMA_InitStruct.PeriphRequest = config->dma_slot; in dma_stm32_configure()
Ddma_mcux_smartdma.c46 uint32_t prog_idx = config->dma_slot; in dma_mcux_smartdma_configure()
Ddma_sedi.c190 config->dma_slot); in dma_sedi_apply_common_config()
198 config->dma_slot); in dma_sedi_apply_common_config()
Ddma_gd32.c417 if (dma_cfg->dma_slot > 0xF) { in dma_gd32_config()
419 dma_cfg->dma_slot); in dma_gd32_config()
478 dma_cfg->dma_slot); in dma_gd32_config()
Ddma_nxp_sdma.c170 switch (config->dma_slot) { in sdma_set_peripheral_type()
173 *type = config->dma_slot; in sdma_set_peripheral_type()
Ddma_andes_atcdmac300.c230 ch_ctrl |= DMA_CH_CTRL_DSTREQ(cfg->dma_slot); in dma_atcdmac300_config()
234 ch_ctrl |= DMA_CH_CTRL_SRCREQ(cfg->dma_slot); in dma_atcdmac300_config()
Ddma_xmc4xxx.c223 uint8_t request_source = XMC4XXX_DMA_GET_REQUEST_SOURCE(config->dma_slot); in dma_xmc4xxx_config()
224 uint8_t dlr_line_reg = XMC4XXX_DMA_GET_LINE(config->dma_slot); in dma_xmc4xxx_config()
Ddma_max32.c96 mxc_dma_cfg.reqsel = config->dma_slot << ADI_MAX32_DMA_CFG_REQ_POS; in max32_dma_config()
Ddmamux_stm32.c125 int request_id = config->dma_slot; in dmamux_stm32_configure()
/Zephyr-latest/tests/drivers/dma/chan_link_transfer/src/
Dtest_dma.c78 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_task()
103 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START + 1; in test_task()
/Zephyr-latest/drivers/mipi_dsi/
Ddsi_mcux_2l.c55 uint8_t dma_slot; member
116 dma_cfg.dma_slot = data->dma_slot; in dsi_mcux_tx_color()
257 data->dma_slot = kSMARTDMA_MIPI_RGB888_DMA; in dsi_mcux_attach()
261 data->dma_slot = kSMARTDMA_MIPI_RGB565_DMA; in dsi_mcux_attach()
/Zephyr-latest/drivers/adc/
Dadc_mcux_adc16.c36 uint32_t dma_slot; /* ADC DMA MUX slot */ member
392 data->adc_dma_config.dma_cfg.dma_slot = config->dma_slot; in mcux_adc16_init()
447 .dma_slot = DT_INST_DMAS_CELL_BY_IDX(n, 0, source), \
/Zephyr-latest/tests/drivers/dma/loop_transfer/src/
Dtest_dma_loop.c122 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_loop()
213 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_loop_suspend_resume()
388 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_loop_repeated_start_stop()
/Zephyr-latest/tests/drivers/dma/chan_blen_transfer/src/
Dtest_dma.c56 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_task()
/Zephyr-latest/tests/drivers/dma/scatter_gather/src/
Dtest_dma_sg.c91 dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START; in test_sg()
/Zephyr-latest/tests/boards/intel_adsp/ssp/src/
Dmain.c106 dma_cfg.dma_slot = props->dma_hs_id; in config_output_dma()
146 dma_cfg_rx.dma_slot = props->dma_hs_id; in config_input_dma()
/Zephyr-latest/drivers/disk/
Dsdmmc_stm32.c218 handle->Init.Channel = dma->cfg.dma_slot * DMA_CHANNEL_1; in stm32_sdmmc_configure_dma()
758 .dma_slot = STM32_DMA_SLOT(0, dir, slot), \
/Zephyr-latest/drivers/video/
Dvideo_mcux_smartdma.c104 sdma_config.dma_slot = kSMARTDMA_CameraDiv16FrameQVGA; in nxp_video_sdma_stream_start()
/Zephyr-latest/include/zephyr/drivers/
Ddma.h199 uint32_t dma_slot : 8; member

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