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/Zephyr-latest/drivers/adc/
Dadc_common.c14 uint8_t div; in adc_gain_invert() member
17 [ADC_GAIN_1_6] = {.mul = 6, .div = 1}, in adc_gain_invert()
18 [ADC_GAIN_1_5] = {.mul = 5, .div = 1}, in adc_gain_invert()
19 [ADC_GAIN_1_4] = {.mul = 4, .div = 1}, in adc_gain_invert()
20 [ADC_GAIN_1_3] = {.mul = 3, .div = 1}, in adc_gain_invert()
21 [ADC_GAIN_2_5] = {.mul = 5, .div = 2}, in adc_gain_invert()
22 [ADC_GAIN_1_2] = {.mul = 2, .div = 1}, in adc_gain_invert()
23 [ADC_GAIN_2_3] = {.mul = 3, .div = 2}, in adc_gain_invert()
24 [ADC_GAIN_4_5] = {.mul = 5, .div = 4}, in adc_gain_invert()
25 [ADC_GAIN_1] = {.mul = 1, .div = 1}, in adc_gain_invert()
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/Zephyr-latest/soc/snps/arc_iot/
Dsysconf.c106 void arc_iot_ahb_clk_divisor(uint8_t div) in arc_iot_ahb_clk_divisor() argument
108 sysconf_reg_ptr->AHBCLKDIV = div; in arc_iot_ahb_clk_divisor()
129 void arc_iot_apb_clk_divisor(uint8_t div) in arc_iot_apb_clk_divisor() argument
131 sysconf_reg_ptr->APBCLKDIV = div; in arc_iot_apb_clk_divisor()
152 void arc_iot_dio_clk_divisor(uint8_t div) in arc_iot_dio_clk_divisor() argument
157 void arc_iot_spi_master_clk_divisor(uint8_t id, uint8_t div) in arc_iot_spi_master_clk_divisor() argument
161 (sysconf_reg_ptr->SPI_MST_CLKDIV & 0xffffff00) | div; in arc_iot_spi_master_clk_divisor()
164 (sysconf_reg_ptr->SPI_MST_CLKDIV & 0xffff00ff) | (div << 8); in arc_iot_spi_master_clk_divisor()
167 (sysconf_reg_ptr->SPI_MST_CLKDIV & 0xff00ffff) | (div << 16); in arc_iot_spi_master_clk_divisor()
171 void arc_iot_gpio8b_dbclk_div(uint8_t bank, uint8_t div) in arc_iot_gpio8b_dbclk_div() argument
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Dsysconf.h143 extern void arc_iot_ahb_clk_divisor(uint8_t div);
146 extern void arc_iot_sdio_clk_divisor(uint8_t div);
147 extern void arc_iot_spi_master_clk_divisor(uint8_t id, uint8_t div);
148 extern void arc_iot_gpio8b_dbclk_div(uint8_t bank, uint8_t div);
149 extern void arc_iot_gpio4b_dbclk_div(uint8_t bank, uint8_t div);
150 extern void arc_iot_i2s_tx_clk_div(uint8_t div);
151 extern void arc_iot_i2s_rx_clk_div(uint8_t div);
155 extern void arc_iot_dvfs_clk_divisor(uint8_t level, uint8_t div);
159 extern void arc_iot_uart3_clk_divisor(uint8_t div);
161 extern void arc_iot_eflash_clk_div(uint8_t div);
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/boards/
Dclear_clocks.overlay20 /delete-property/ hsi-div;
36 /delete-property/ div-m;
38 /delete-property/ div-p;
39 /delete-property/ div-q;
40 /delete-property/ div-r;
46 /delete-property/ div-m;
48 /delete-property/ div-p;
49 /delete-property/ div-q;
50 /delete-property/ div-r;
56 /delete-property/ div-m;
[all …]
Dpll_hsi_96.overlay13 hsi-div = <8>; /* HSI RC: 64MHz, hsi_clk = 8MHz */
18 div-m = <1>;
20 div-p = <2>;
21 div-q = <4>;
22 div-r = <2>;
Dpll_hsi_fracn_550.overlay13 hsi-div = <1>; /* HSI RC: 64MHz, hsi_clk = 64MHz */
18 div-m = <4>;
20 div-p = <1>;
21 div-q = <4>;
22 div-r = <2>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/
Dcore_init.overlay25 /delete-property/ hsi-div;
41 /delete-property/ div-m;
43 /delete-property/ div-p;
44 /delete-property/ div-q;
45 /delete-property/ div-r;
51 /delete-property/ div-m;
53 /delete-property/ div-p;
54 /delete-property/ div-q;
55 /delete-property/ div-r;
61 /delete-property/ div-m;
[all …]
/Zephyr-latest/soc/nxp/imxrt/imxrt118x/
Dsoc.c105 rootCfg.div = 1; in clock_init()
111 rootCfg.div = 2; in clock_init()
183 rootCfg.div = 1; in clock_init()
190 rootCfg.div = 2; in clock_init()
196 rootCfg.div = 4; in clock_init()
201 rootCfg.div = 4; in clock_init()
206 rootCfg.div = 2; in clock_init()
211 rootCfg.div = 3; in clock_init()
217 rootCfg.div = 240; in clock_init()
224 rootCfg.div = 240; in clock_init()
[all …]
/Zephyr-latest/doc/connectivity/networking/conn_mgr/figures/
Dintegration_diagram_detailed.drawio13 …b8zi3n4dXzB52SZQf6J-10" value="&lt;div&gt;network&lt;/div&gt;&lt;div&gt;readiness&lt;/div&gt;&lt;d…
16 …<mxCell id="Db8zi3n4dXzB52SZQf6J-11" value="&lt;div&gt;Application&lt;/div&gt;" style="rounded=0;w…
19 …div&gt;&lt;br&gt;&lt;/div&gt;&lt;div&gt;&lt;br&gt;&lt;/div&gt;&lt;div&gt;&lt;br&gt;&lt;/div&gt;&lt…
31 …ue="&lt;div&gt;Zephyr ifaces (unbound)&lt;/div&gt;&lt;div&gt;&lt;br&gt;&lt;/div&gt;&lt;div&gt;&lt;…
46 …<mxCell id="Db8zi3n4dXzB52SZQf6J-32" value="&lt;div&gt;binding&lt;/div&gt;" style="rounded=0;white…
57 …<mxCell id="Db8zi3n4dXzB52SZQf6J-33" value="&lt;div&gt;binding&lt;/div&gt;" style="rounded=0;white…
60 …<mxCell id="Db8zi3n4dXzB52SZQf6J-34" value="&lt;div&gt;binding&lt;/div&gt;" style="rounded=0;white…
70 …n4dXzB52SZQf6J-45" value="&lt;div&gt;Connectivity&lt;/div&gt;&lt;div&gt;Implementation&lt;/div&gt;…
80 …4dXzB52SZQf6J-46" value="&lt;div&gt;Connectivity&lt;/div&gt;&lt;div&gt;Implementation&lt;/div&gt;&…
83 …l id="Db8zi3n4dXzB52SZQf6J-55" value="&lt;div&gt;Connectivity&lt;/div&gt;&lt;div&gt;Bindings&lt;br…
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Dintegration_diagram_simplified.drawio10 …b8zi3n4dXzB52SZQf6J-10" value="&lt;div&gt;network&lt;/div&gt;&lt;div&gt;readiness&lt;/div&gt;&lt;d…
13 …<mxCell id="Db8zi3n4dXzB52SZQf6J-11" value="&lt;div&gt;Application&lt;/div&gt;" style="rounded=0;w…
19 …l id="Db8zi3n4dXzB52SZQf6J-71" value="&lt;div&gt;connectivity&lt;/div&gt;&lt;div&gt;commands&lt;br…
22 …Cell id="Db8zi3n4dXzB52SZQf6J-89" value="&lt;div&gt;iface commands&lt;/div&gt;&lt;div&gt;and event…
25 …ell id="Db8zi3n4dXzB52SZQf6J-113" value="&lt;div&gt;iface commands&lt;/div&gt;&lt;div&gt;and event…
40 …ell id="Db8zi3n4dXzB52SZQf6J-135" value="&lt;div&gt;network&lt;/div&gt;&lt;div&gt;commands&lt;br&g…
68 …<mxCell id="Db8zi3n4dXzB52SZQf6J-144" value="&lt;div&gt;Zephyr ifaces&lt;/div&gt;" style="rounded=…
91 …B52SZQf6J-162" value="&lt;div&gt;connectivity&lt;/div&gt;&lt;div&gt;commands&lt;/div&gt;&lt;div&gt…
94 …<mxCell id="Db8zi3n4dXzB52SZQf6J-167" value="&lt;div&gt;iface events&lt;/div&gt;" style="text;html…
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dsoc.c231 rootCfg.div = 1; in clock_init()
236 rootCfg.div = 1; in clock_init()
240 rootCfg.div = 1; in clock_init()
246 rootCfg.div = 1; in clock_init()
250 rootCfg.div = 1; in clock_init()
315 rootCfg.div = 1; in clock_init()
322 rootCfg.div = 2; in clock_init()
327 rootCfg.div = 1; in clock_init()
334 rootCfg.div = 2; in clock_init()
339 rootCfg.div = 2; in clock_init()
[all …]
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/
Dclear_clocks.overlay31 /delete-property/ hsi-div;
39 /delete-property/ div-m;
41 /delete-property/ div-p;
42 /delete-property/ div-q;
43 /delete-property/ div-r;
50 /delete-property/ div-m;
52 /delete-property/ div-p;
53 /delete-property/ div-q;
54 /delete-property/ div-r;
Dpll_hsi_240.overlay14 hsi-div = <1>; /* HSI RC: 64MHz, hsi_clk = 64MHz */
19 div-m = <4>;
21 div-p = <2>;
22 div-q = <2>;
23 div-r = <2>;
/Zephyr-latest/doc/services/ipc/ipc_service/backends/
Dicbmsg_memory.svg8 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
9 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
10 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
12 </div>
13 </div>
14 </div>
25 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
26 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
27 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
29 </div>
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Dicbmsg_message.svg8 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
9 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
10 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
12 </div>
13 </div>
14 </div>
25 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
26 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
27 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
29 </div>
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Dicbmsg_flows.svg8 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
9 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
10 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
14 </div>
15 </div>
16 </div>
27 …<div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justif…
28 …<div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: border-box; font-size: 0px; tex…
29 …<div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); l…
33 </div>
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/Zephyr-latest/doc/safety/images/
DIEC-61508-basis.svg1 …div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justify…
Dzephyr-safety-process.svg1 …div xmlns="http://www.w3.org/1999/xhtml" style="display: flex; align-items: unsafe center; justify…
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/
Dg0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay22 /delete-property/ div-m;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
50 div-m = <1>;
52 div-p = <20>; /* 6.4 MHz */
53 div-q = <2>;
54 div-r = <2>;
Dg4_i2c1_hsi_adc1_pllp.overlay22 /delete-property/ div-m;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
46 div-m = <1>;
48 div-p = <20>; /* 6.4 MHz */
49 div-q = <2>;
50 div-r = <2>;
Dg0_i2c1_sysclk_lptim1_lsi.overlay22 /delete-property/ div-m;
24 /delete-property/ div-p;
25 /delete-property/ div-q;
26 /delete-property/ div-r;
50 div-m = <1>;
52 div-p = <2>;
53 div-q = <2>;
54 div-r = <2>;
Dwl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay21 /delete-property/ hsi-div;
30 /delete-property/ div-m;
32 /delete-property/ div-p;
33 /delete-property/ div-q;
34 /delete-property/ div-r;
64 div-m = <1>;
66 div-p = <20>; /* 12.8 MHz */
67 div-q = <2>;
68 div-r = <2>;
Dl4_i2c1_hsi_lptim1_lse.overlay27 /delete-property/ div-m;
29 /delete-property/ div-p;
30 /delete-property/ div-q;
31 /delete-property/ div-r;
55 div-m = <1>;
57 div-p = <7>;
58 div-q = <2>;
59 div-r = <4>;
/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/
Dcy8ckit_062s2_ai.dts57 clock-div = <1>;
62 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
65 clock-div = <1>;
69 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
72 clock-div = <2>;
76 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
79 clock-div = <1>;
/Zephyr-latest/boards/infineon/cy8cproto_063_ble/
Dcy8cproto_063_ble.dts99 clock-div = <1>;
104 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
107 clock-div = <1>;
111 * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz
114 clock-div = <2>;
118 * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz
121 clock-div = <1>;

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