Home
last modified time | relevance | path

Searched refs:dev_config (Results 1 – 25 of 91) sorted by relevance

1234

/Zephyr-latest/drivers/eeprom/
Deeprom_emulator.c112 const struct eeprom_emu_config *dev_config = dev->config; in eeprom_emu_flash_read() local
114 return flash_read(dev_config->flash_dev, dev_config->flash_offset + in eeprom_emu_flash_read()
124 const struct eeprom_emu_config *dev_config = dev->config; in eeprom_emu_flash_write() local
127 rc = flash_write(dev_config->flash_dev, dev_config->flash_offset + in eeprom_emu_flash_write()
139 const struct eeprom_emu_config *dev_config = dev->config; in eeprom_emu_flash_erase() local
142 rc = flash_erase(dev_config->flash_dev, dev_config->flash_offset + in eeprom_emu_flash_erase()
152 const struct eeprom_emu_config *dev_config = dev->config; in eeprom_emu_page_invalidate() local
153 uint8_t buf[dev_config->flash_cbs]; in eeprom_emu_page_invalidate()
159 offset += (dev_config->page_size - sizeof(buf)); in eeprom_emu_page_invalidate()
169 const struct eeprom_emu_config *dev_config = dev->config; in eeprom_emu_get_address() local
[all …]
/Zephyr-latest/drivers/dma/
Ddmamux_stm32.c96 const struct dmamux_stm32_dma_fops *get_dma_fops(const struct dmamux_stm32_config *dev_config) in get_dma_fops() argument
99 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux1))) { in get_dma_fops()
105 if (dev_config->base == DT_REG_ADDR(DT_NODELABEL(dmamux2))) { in get_dma_fops()
110 __ASSERT(false, "Unknown dma base address %x", dev_config->base); in get_dma_fops()
118 const struct dmamux_stm32_config *dev_config = dev->config; in dmamux_stm32_configure() local
119 const struct dmamux_stm32_dma_fops *dma_device = get_dma_fops(dev_config); in dmamux_stm32_configure()
127 if (request_id > dev_config->req_nb + dev_config->gen_nb) { in dmamux_stm32_configure()
133 if (id >= dev_config->channel_nb) { in dmamux_stm32_configure()
149 if (dma_device->configure(dev_config->mux_channels[id].dev_dma, in dmamux_stm32_configure()
150 dev_config->mux_channels[id].dma_id, config) != 0) { in dmamux_stm32_configure()
[all …]
Ddma_mcux_smartdma.c44 const struct dma_mcux_smartdma_config *dev_config = dev->config; in dma_mcux_smartdma_configure() local
58 dev_config->base->ARM2EZH = (uint32_t)config->head_block; in dma_mcux_smartdma_configure()
60 dev_config->base->BOOTADR = (uint32_t)dev_config->smartdma_progs[prog_idx]; in dma_mcux_smartdma_configure()
61 LOG_DBG("Boot address set to 0x%X", dev_config->base->BOOTADR); in dma_mcux_smartdma_configure()
/Zephyr-latest/drivers/spi/
Dspi_nrfx_spis.c65 const struct spi_nrfx_config *dev_config = dev->config; in configure() local
107 nrf_spis_configure(dev_config->spis.p_reg, in configure()
118 const struct spi_nrfx_config *dev_config = dev->config; in prepare_for_transfer() local
121 if (tx_buf_len > dev_config->max_buf_len || in prepare_for_transfer()
122 rx_buf_len > dev_config->max_buf_len) { in prepare_for_transfer()
128 result = nrfx_spis_buffers_set(&dev_config->spis, in prepare_for_transfer()
143 const struct spi_nrfx_config *dev_config = dev_data->dev->config; in wake_callback() local
145 (void)gpio_pin_interrupt_configure_dt(&dev_config->wake_gpio, in wake_callback()
151 const struct spi_nrfx_config *dev_config) in wait_for_wake() argument
156 if (gpio_pin_get_raw(dev_config->wake_gpio.port, in wait_for_wake()
[all …]
Dspi_litex.c38 const struct spi_litex_cfg *dev_config = dev->config; in spi_set_frequency() local
40 if (!dev_config->clk_divider_exists) { in spi_set_frequency()
48 litex_write16(divisor, dev_config->clk_divider_addr); in spi_set_frequency()
54 const struct spi_litex_cfg *dev_config = dev->config; in spi_config() local
57 if (config->slave >= dev_config->max_cs) { in spi_config()
67 if (SPI_WORD_SIZE_GET(config->operation) > dev_config->data_width) { in spi_config()
68 LOG_ERR("Word size must be <= %d", dev_config->data_width); in spi_config()
104 if (!litex_read8(dev_config->loopback_addr) != !(config->operation & SPI_MODE_LOOP)) { in spi_config()
106 dev_config->loopback_addr); in spi_config()
115 litex_write16(*control, dev_config->control_addr); in spi_config()
[all …]
Dspi_nrfx_spim.c103 const struct spi_nrfx_config *dev_config = dev->config; in request_clock() local
106 if (!dev_config->clk_dev) { in request_clock()
111 dev_config->clk_dev, &dev_config->clk_spec, in request_clock()
130 const struct spi_nrfx_config *dev_config = dev->config; in release_clock() local
138 nrf_clock_control_release(dev_config->clk_dev, &dev_config->clk_spec); in release_clock()
147 const struct spi_nrfx_config *dev_config = dev->config; in finalize_spi_transaction() local
148 void *reg = dev_config->spim.p_reg; in finalize_spi_transaction()
220 const struct spi_nrfx_config *dev_config = dev->config; in configure() local
222 uint32_t max_freq = dev_config->max_freq; in configure()
273 config = dev_config->def_config; in configure()
[all …]
Dspi_litex_litespi.c44 const struct spi_litex_dev_config *dev_config = dev->config; in spi_litex_set_frequency() local
46 if (!dev_config->phy_clk_divisor_exists) { in spi_litex_set_frequency()
54 litex_write32(divisor, dev_config->phy_clk_divisor_addr); in spi_litex_set_frequency()
139 const struct spi_litex_dev_config *dev_config = dev->config; in spi_litex_xfer() local
150 spiflash_len_mask_width_write(len * 8, width, mask, dev_config->core_master_phyconfig_addr); in spi_litex_xfer()
152 litex_write32(BIT(config->slave), dev_config->core_master_cs_addr); in spi_litex_xfer()
155 while ((litex_read8(dev_config->core_master_status_addr) & in spi_litex_xfer()
157 rxd = litex_read32(dev_config->core_master_rxtx_addr); in spi_litex_xfer()
162 len = MIN(spi_context_max_continuous_chunk(ctx), dev_config->core_master_rxtx_size); in spi_litex_xfer()
165 dev_config->core_master_phyconfig_addr); in spi_litex_xfer()
[all …]
Dspi_nrfx_spi.c91 const struct spi_nrfx_config *dev_config = dev->config; in configure() local
132 config = dev_config->def_config; in configure()
138 nrf_gpio_pin_write(nrf_spi_sck_pin_get(dev_config->spi.p_reg), in configure()
142 nrfx_spi_uninit(&dev_config->spi); in configure()
146 result = nrfx_spi_init(&dev_config->spi, &config, in configure()
173 const struct spi_nrfx_config *dev_config = dev->config; in transfer_next_chunk() local
190 result = nrfx_spi_xfer(&dev_config->spi, &xfer, 0); in transfer_next_chunk()
230 const struct spi_nrfx_config *dev_config = dev->config; in transceive() local
239 if (dev_config->wake_pin != WAKE_PIN_NOT_USED) { in transceive()
240 error = spi_nrfx_wake_request(&dev_config->wake_gpiote, in transceive()
[all …]
/Zephyr-latest/drivers/display/
Ddisplay_nrf_led_matrix.c47 #define GET_ROW_IDX(dev_config, pixel_idx) \ argument
48 _GET_ROW_IDX(dev_config->pixel_mapping[pixel_idx])
53 #define GET_COL_IDX(dev_config, pixel_idx) \ argument
54 _GET_COL_IDX(dev_config->pixel_mapping[pixel_idx])
130 const struct display_drv_config *dev_config = dev->config; in api_blanking_on() local
133 nrf_timer_task_trigger(dev_config->timer, NRF_TIMER_TASK_STOP); in api_blanking_on()
135 set_pin(dev_config->rows[i], false); in api_blanking_on()
138 set_pin(dev_config->cols[i], false); in api_blanking_on()
150 const struct display_drv_config *dev_config = dev->config; in api_blanking_off() local
155 nrf_timer_task_trigger(dev_config->timer, NRF_TIMER_TASK_CLEAR); in api_blanking_off()
[all …]
Ddisplay_max7219.c76 const struct max7219_config *dev_config = dev->config; in max7219_transmit_all() local
81 .len = dev_config->num_cascading * 2, in max7219_transmit_all()
88 for (int i = 0; i < dev_config->num_cascading; i++) { in max7219_transmit_all()
93 return spi_write_dt(&dev_config->spi, &tx_bufs); in max7219_transmit_all()
99 const struct max7219_config *dev_config = dev->config; in max7219_transmit_one() local
104 .len = dev_config->num_cascading * 2, in max7219_transmit_one()
111 for (int i = 0; i < dev_config->num_cascading; i++) { in max7219_transmit_one()
112 if (i != (dev_config->num_cascading - 1 - max7219_idx)) { in max7219_transmit_one()
122 return spi_write_dt(&dev_config->spi, &tx_bufs); in max7219_transmit_one()
145 const struct max7219_config *dev_config = dev->config; in max7219_write() local
[all …]
/Zephyr-latest/drivers/flash/
Dsoc_flash_xmc4xxx.c58 const struct flash_xmc4xxx_config *dev_config = dev->config; in flash_xmc4xxx_read() local
60 if (offset < 0 || offset + len > dev_config->size) { in flash_xmc4xxx_read()
63 memcpy(data, (void *)(dev_config->base + offset), len); in flash_xmc4xxx_read()
73 const struct flash_xmc4xxx_config *dev_config = dev->config; in flash_xmc4xxx_write() local
75 uint32_t flash_addr = dev_config->base; in flash_xmc4xxx_write()
79 if (offset < 0 || offset + len > dev_config->size) { in flash_xmc4xxx_write()
83 if (len % dev_config->parameters.write_block_size || in flash_xmc4xxx_write()
84 offset % dev_config->parameters.write_block_size > 0) { in flash_xmc4xxx_write()
94 num_pages = len / dev_config->parameters.write_block_size; in flash_xmc4xxx_write()
101 memcpy(aligned_page, src, dev_config->parameters.write_block_size); in flash_xmc4xxx_write()
[all …]
/Zephyr-latest/drivers/i2c/
Di2c_nrfx_twis.c88 const struct shim_nrf_twis_config *dev_config = dev->config; in shim_nrf_twis_enable() local
98 (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT); in shim_nrf_twis_enable()
99 nrfx_twis_enable(&dev_config->twis); in shim_nrf_twis_enable()
106 const struct shim_nrf_twis_config *dev_config = dev->config; in shim_nrf_twis_disable() local
113 nrfx_twis_disable(&dev_config->twis); in shim_nrf_twis_disable()
114 (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_SLEEP); in shim_nrf_twis_disable()
120 const struct shim_nrf_twis_config *dev_config = dev->config; in shim_nrf_twis_handle_read_req() local
123 const nrfx_twis_t *twis = &dev_config->twis; in shim_nrf_twis_handle_read_req()
138 memcpy(dev_config->buf, buf, buf_size); in shim_nrf_twis_handle_read_req()
140 err = nrfx_twis_tx_prepare(twis, dev_config->buf, buf_size); in shim_nrf_twis_handle_read_req()
[all …]
Di2c_nrfx_twi_common.c30 int i2c_nrfx_twi_configure(const struct device *dev, uint32_t dev_config) in i2c_nrfx_twi_configure() argument
36 if (I2C_ADDR_10_BITS & dev_config) { in i2c_nrfx_twi_configure()
40 switch (I2C_SPEED_GET(dev_config)) { in i2c_nrfx_twi_configure()
51 data->dev_config = dev_config; in i2c_nrfx_twi_configure()
143 if (data->dev_config) { in twi_nrfx_pm_action()
144 i2c_nrfx_twi_configure(dev, data->dev_config); in twi_nrfx_pm_action()
Di2c_handlers.c12 uint32_t dev_config) in z_vrfy_i2c_configure() argument
15 return z_impl_i2c_configure((const struct device *)dev, dev_config); in z_vrfy_i2c_configure()
20 uint32_t *dev_config) in z_vrfy_i2c_get_config() argument
23 K_OOPS(K_SYSCALL_MEMORY_WRITE(dev_config, sizeof(uint32_t))); in z_vrfy_i2c_get_config()
25 return z_impl_i2c_get_config(dev, dev_config); in z_vrfy_i2c_get_config()
Di2c_b91.c31 static int i2c_b91_configure(const struct device *dev, uint32_t dev_config) in i2c_b91_configure() argument
38 if (dev_config & I2C_ADDR_10_BITS) { in i2c_b91_configure()
44 if (!(dev_config & I2C_MODE_CONTROLLER)) { in i2c_b91_configure()
50 switch (I2C_SPEED_GET(dev_config)) { in i2c_b91_configure()
127 uint32_t dev_config = (I2C_MODE_CONTROLLER | i2c_map_dt_bitrate(cfg->bitrate)); in i2c_b91_init() local
133 status = i2c_b91_configure(dev, dev_config); in i2c_b91_init()
Di2c_npcx_port.c55 uint32_t dev_config) in i2c_npcx_port_configure() argument
65 if (!(dev_config & I2C_MODE_CONTROLLER)) { in i2c_npcx_port_configure()
69 if (dev_config & I2C_ADDR_10_BITS) { in i2c_npcx_port_configure()
74 return npcx_i2c_ctrl_configure(config->i2c_ctrl, dev_config); in i2c_npcx_port_configure()
77 static int i2c_npcx_port_get_config(const struct device *dev, uint32_t *dev_config) in i2c_npcx_port_get_config() argument
90 *dev_config = (I2C_MODE_CONTROLLER | speed); in i2c_npcx_port_get_config()
Di2c_bitbang.c42 int i2c_bitbang_configure(struct i2c_bitbang *context, uint32_t dev_config) in i2c_bitbang_configure() argument
45 if (I2C_ADDR_10_BITS & dev_config) { in i2c_bitbang_configure()
50 switch (I2C_SPEED_GET(dev_config)) { in i2c_bitbang_configure()
63 context->dev_config = dev_config; in i2c_bitbang_configure()
70 if (context->dev_config == 0) { in i2c_bitbang_get_config()
74 *config = context->dev_config; in i2c_bitbang_get_config()
Di2c_ifx_xmc4.c62 uint32_t dev_config; member
79 static int ifx_xmc4_i2c_configure(const struct device *dev, uint32_t dev_config) in ifx_xmc4_i2c_configure() argument
85 if (dev_config & I2C_ADDR_10_BITS) { in ifx_xmc4_i2c_configure()
90 switch (I2C_SPEED_GET(dev_config)) { in ifx_xmc4_i2c_configure()
102 data->dev_config = dev_config; in ifx_xmc4_i2c_configure()
116 if (data->dev_config & I2C_MODE_CONTROLLER) { in ifx_xmc4_i2c_configure()
132 static int ifx_xmc4_i2c_get_config(const struct device *dev, uint32_t *dev_config) in ifx_xmc4_i2c_get_config() argument
142 *dev_config = I2C_MODE_CONTROLLER | bitrate_cfg; in ifx_xmc4_i2c_get_config()
146 *dev_config = data->dev_config; in ifx_xmc4_i2c_get_config()
337 bitrate = I2C_SPEED_GET(data->dev_config); in ifx_xmc4_i2c_target_register()
Di2c_bitbang.h32 uint32_t dev_config; member
50 int i2c_bitbang_configure(struct i2c_bitbang *bitbang, uint32_t dev_config);
Di2c_sifive.c201 static int i2c_sifive_configure(const struct device *dev, uint32_t dev_config) in i2c_sifive_configure() argument
222 switch (I2C_SPEED_GET(dev_config)) { in i2c_sifive_configure()
246 if (!(dev_config & I2C_MODE_CONTROLLER)) { in i2c_sifive_configure()
255 if (dev_config & I2C_ADDR_10_BITS) { in i2c_sifive_configure()
305 uint32_t dev_config = 0U; in i2c_sifive_init() local
308 dev_config = (I2C_MODE_CONTROLLER | i2c_map_dt_bitrate(config->f_bus)); in i2c_sifive_init()
310 rc = i2c_sifive_configure(dev, dev_config); in i2c_sifive_init()
/Zephyr-latest/drivers/watchdog/
Dwdt_dw.c76 __maybe_unused const struct dw_wdt_dev_cfg *const dev_config = dev->config; local
86 if (config->callback && !dev_config->irq_config) {
128 const struct dw_wdt_dev_cfg *const dev_config = dev->config; local
134 if (dev_config->reset_spec.dev != NULL) {
135 if (!device_is_ready(dev_config->reset_spec.dev)) {
141 ret = reset_line_toggle(dev_config->reset_spec.dev, dev_config->reset_spec.id);
161 const struct dw_wdt_dev_cfg *const dev_config = dev->config; local
177 if (!device_is_ready(dev_config->clk_dev)) {
182 ret = clock_control_get_rate(dev_config->clk_dev, dev_config->clkid,
189 ret = dw_wdt_probe((uint32_t)reg_base, dev_config->reset_pulse_length);
[all …]
Dwdt_intel_adsp.c65 const struct intel_adsp_wdt_dev_cfg *const dev_config = dev->config; in intel_adsp_wdt_setup() local
84 intel_adsp_wdt_reset_set(dev_config->base, i, dev_data->allow_reset); in intel_adsp_wdt_setup()
93 const struct intel_adsp_wdt_dev_cfg *const dev_config = dev->config; in intel_adsp_wdt_install_timeout() local
106 ret = dw_wdt_calc_period(dev_data->core_wdt[0], dev_config->clk_freq, config, in intel_adsp_wdt_install_timeout()
152 const struct intel_adsp_wdt_dev_cfg *const dev_config = dev->config; in intel_adsp_wdt_init() local
158 dev_data->core_wdt[i] = intel_adsp_wdt_pointer_get(dev_config->base, i); in intel_adsp_wdt_init()
184 const struct intel_adsp_wdt_dev_cfg *const dev_config = dev->config; in intel_adsp_watchdog_pause() local
190 intel_adsp_wdt_pause(dev_config->base, channel_id); in intel_adsp_watchdog_pause()
204 const struct intel_adsp_wdt_dev_cfg *const dev_config = dev->config; in intel_adsp_watchdog_resume() local
210 intel_adsp_wdt_resume(dev_config->base, channel_id); in intel_adsp_watchdog_resume()
/Zephyr-latest/drivers/clock_control/
Dclock_control_nrf2_global_hsfll.c60 const struct global_hsfll_dev_config *dev_config = dev->config; in global_hsfll_get_max_clock_frequency() local
62 return dev_config->clock_frequencies[ARRAY_SIZE(dev_config->clock_frequencies) - 1]; in global_hsfll_get_max_clock_frequency()
69 const struct global_hsfll_dev_config *dev_config = dev->config; in global_hsfll_find_mgr() local
85 for (uint8_t i = 0; i < ARRAY_SIZE(dev_config->clock_frequencies); i++) { in global_hsfll_find_mgr()
86 if (dev_config->clock_frequencies[i] < frequency) { in global_hsfll_find_mgr()
148 const struct global_hsfll_dev_config *dev_config = dev->config; in global_hsfll_freq_idx_to_nrfs_freq() local
150 return ARRAY_SIZE(dev_config->clock_frequencies) - 1 - freq_idx; in global_hsfll_freq_idx_to_nrfs_freq()
/Zephyr-latest/subsys/mgmt/osdp/src/
Dosdp.c37 struct uart_config dev_config; member
207 p->dev_config.baudrate = CONFIG_OSDP_UART_BAUD_RATE; in osdp_init()
208 p->dev_config.data_bits = UART_CFG_DATA_BITS_8; in osdp_init()
209 p->dev_config.parity = UART_CFG_PARITY_NONE; in osdp_init()
210 p->dev_config.stop_bits = UART_CFG_STOP_BITS_1; in osdp_init()
211 p->dev_config.flow_ctrl = UART_CFG_FLOW_CTRL_NONE; in osdp_init()
212 uart_configure(p->dev, &p->dev_config); in osdp_init()
/Zephyr-latest/tests/drivers/sensor/adltc2990/src/
Dmain.c203 const struct adltc2990_config *dev_config = fixture->target->dev->config; in ZTEST_F() local
205 CHECK_CURRENT(current_values, 0, 0.3f, dev_config->pins_v1_v2.pins_current_resistor); in ZTEST_F()
211 CHECK_CURRENT(current_values, 0, 0.159f, dev_config->pins_v1_v2.pins_current_resistor); in ZTEST_F()
340 const struct adltc2990_config *dev_config = fixture->target->dev->config; in ZTEST_F() local
342 CHECK_CURRENT(current_values, 0, 0.3f, dev_config->pins_v1_v2.pins_current_resistor); in ZTEST_F()
348 CHECK_CURRENT(current_values, 1, 0.159f, dev_config->pins_v3_v4.pins_current_resistor); in ZTEST_F()
448 const struct adltc2990_config *dev_config = fixture->dev->config; in ZTEST_F() local
451 dev_config->pins_v1_v2.voltage_divider_resistors.v1_r1_r2[0], in ZTEST_F()
452 dev_config->pins_v1_v2.voltage_divider_resistors.v1_r1_r2[1]); in ZTEST_F()
455 dev_config->pins_v1_v2.voltage_divider_resistors.v2_r1_r2[0], in ZTEST_F()
[all …]

1234