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Searched refs:clk_id (Results 1 – 25 of 34) sorted by relevance

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/Zephyr-latest/drivers/clock_control/
Dclock_control_arm_scmi.c24 uint32_t clk_id; in scmi_clock_on_off() local
29 clk_id = POINTER_TO_UINT(clk); in scmi_clock_on_off()
31 if (clk_id >= data->clk_num) { in scmi_clock_on_off()
38 cfg.clk_id = clk_id; in scmi_clock_on_off()
58 uint32_t clk_id; in scmi_clock_get_rate() local
62 clk_id = POINTER_TO_UINT(clk); in scmi_clock_get_rate()
64 if (clk_id >= data->clk_num) { in scmi_clock_get_rate()
68 return scmi_clock_rate_get(proto, clk_id, rate); in scmi_clock_get_rate()
Dclock_control_npcm.c198 uint32_t clk_id = (uint32_t)sub_system; in npcm_get_cfg() local
202 if (clk_cfg[i].clock_id == clk_id) { in npcm_get_cfg()
212 uint32_t clk_id = (uint32_t)sub_system; in npcm_clock_control_on() local
218 LOG_ERR("Unsupported clock id %d", clk_id); in npcm_clock_control_on()
231 uint32_t clk_id = (uint32_t)sub_system; in npcm_clock_control_off() local
237 LOG_ERR("Unsupported clock id %d", clk_id); in npcm_clock_control_off()
251 uint32_t clk_id = (uint32_t)sub_system; in npcm_clock_control_get_subsys_rate() local
256 LOG_ERR("Unsupported clock id %d", clk_id); in npcm_clock_control_get_subsys_rate()
Dclock_control_ast10x0.c98 uint32_t clk_id = (uint32_t)sub_system; in aspeed_clock_control_get_rate() local
101 switch (clk_id) { in aspeed_clock_control_get_rate()
Dclock_control_smartbond.c562 uint32_t clk_id; in smartbond_clocks_init() local
590 clk_id = DT_DEP_ORD(DT_PROP(DT_NODELABEL(lp_clk), clock_src)); in smartbond_clocks_init()
591 lp_clk = smartbond_dt_ord_to_clock(clk_id); in smartbond_clocks_init()
594 clk_id = DT_DEP_ORD(DT_PROP(DT_NODELABEL(sys_clk), clock_src)); in smartbond_clocks_init()
595 sys_clk = smartbond_dt_ord_to_clock(clk_id); in smartbond_clocks_init()
/Zephyr-latest/drivers/misc/pio_rpi_pico/
Dpio_rpi_pico.c19 clock_control_subsys_t clk_id; member
49 ret = clock_control_on(config->clk_dev, config->clk_id); in pio_rpi_pico_init()
66 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(0, clocks, 0, clk_id), \
/Zephyr-latest/subsys/net/lib/ptp/
Dbtca.c23 int diff = memcmp(&p1->clk_id, &p2->clk_id, sizeof(p1->clk_id)); in btca_port_id_cmp()
95 int id_diff = memcmp(&a->clk_id, &b->clk_id, sizeof(a->clk_id)); in ptp_btca_ds_cmp()
Dclock.c189 memcpy(&ptp_clk.parent_ds.port_id.clk_id, in clock_update_grandmaster()
190 &ptp_clk.default_ds.clk_id, in clock_update_grandmaster()
193 &ptp_clk.default_ds.clk_id, in clock_update_grandmaster()
254 int ret = clock_generate_id(&dds->clk_id, iface); in ptp_clock_init()
292 LOG_DBG("PTP Clock %s initialized", clock_id_str(&dds->clk_id)); in ptp_clock_init()
381 if (!ptp_clock_id_eq(&dds->clk_id, &target_port->clk_id) && in ptp_clock_management_msg_process()
382 !ptp_clock_id_eq(&target_port->clk_id, &all_ones)) { in ptp_clock_management_msg_process()
609 memcpy(&ds->clk_id, &ptp_clk.default_ds.clk_id, sizeof(ptp_clk_id)); in ptp_clock_ds()
610 memcpy(&ds->sender.clk_id, &ptp_clk.default_ds.clk_id, sizeof(ptp_clk_id)); in ptp_clock_ds()
611 memcpy(&ds->receiver.clk_id, &ptp_clk.default_ds.clk_id, sizeof(ptp_clk_id)); in ptp_clock_ds()
Dds.h33 ptp_clk_id clk_id; member
207 ptp_clk_id clk_id; member
Dddt.h58 ptp_clk_id clk_id; member
/Zephyr-latest/include/zephyr/drivers/firmware/scmi/
Dclk.h30 uint32_t clk_id; member
94 uint32_t clk_id, uint32_t *rate);
/Zephyr-latest/drivers/watchdog/
Dwdt_rpi_pico.c38 clock_control_subsys_t clk_id; member
87 err = clock_control_on(config->clk_dev, config->clk_id); in wdt_rpi_pico_setup()
92 err = clock_control_get_rate(config->clk_dev, config->clk_id, &ref_clk); in wdt_rpi_pico_setup()
185 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(idx, clocks, 0, clk_id), \
/Zephyr-latest/drivers/pwm/
Dpwm_rpi_pico.c38 const clock_control_subsys_t clk_id; member
64 ret = clock_control_get_rate(cfg->clk_dev, cfg->clk_id, &pclk); in pwm_rpi_get_cycles_per_sec()
167 err = clock_control_on(cfg->clk_dev, cfg->clk_id); in pwm_rpi_init()
220 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(idx, clocks, 0, clk_id), \
/Zephyr-latest/subsys/net/l2/ethernet/gptp/
Dgptp.c74 default_ds->clk_id[0] = net_if_get_link_addr(iface)->addr[0]; in gptp_compute_clock_identity()
75 default_ds->clk_id[1] = net_if_get_link_addr(iface)->addr[1]; in gptp_compute_clock_identity()
76 default_ds->clk_id[2] = net_if_get_link_addr(iface)->addr[2]; in gptp_compute_clock_identity()
77 default_ds->clk_id[3] = 0xFF; in gptp_compute_clock_identity()
78 default_ds->clk_id[4] = 0xFE; in gptp_compute_clock_identity()
79 default_ds->clk_id[5] = net_if_get_link_addr(iface)->addr[3]; in gptp_compute_clock_identity()
80 default_ds->clk_id[6] = net_if_get_link_addr(iface)->addr[4]; in gptp_compute_clock_identity()
81 default_ds->clk_id[7] = net_if_get_link_addr(iface)->addr[5]; in gptp_compute_clock_identity()
405 memcpy(parent_ds->port_id.clk_id, default_ds->clk_id, in gptp_init_clock_ds()
407 memcpy(parent_ds->gm_id, default_ds->clk_id, GPTP_CLOCK_ID_LEN); in gptp_init_clock_ds()
[all …]
Dgptp_messages.c333 memcpy(hdr->port_id.clk_id, in gptp_prepare_pdelay_req()
334 port_ds->port_id.clk_id, GPTP_CLOCK_ID_LEN); in gptp_prepare_pdelay_req()
391 memcpy(hdr->port_id.clk_id, port_ds->port_id.clk_id, in gptp_prepare_pdelay_resp()
453 memcpy(hdr->port_id.clk_id, port_ds->port_id.clk_id, in gptp_prepare_pdelay_follow_up()
512 memcpy(hdr->port_id.clk_id, GPTP_DEFAULT_DS()->clk_id, in gptp_prepare_announce()
677 if (memcmp(default_ds->clk_id, resp->requesting_port_id.clk_id, in gptp_handle_pdelay_resp()
682 if (memcmp(default_ds->clk_id, hdr->port_id.clk_id, in gptp_handle_pdelay_resp()
736 if (memcmp(default_ds->clk_id, follow_up->requesting_port_id.clk_id, in gptp_handle_pdelay_follow_up()
742 if (memcmp(default_ds->clk_id, hdr->port_id.clk_id, in gptp_handle_pdelay_follow_up()
Dgptp_user_api.c79 char *gptp_sprint_clock_id(const uint8_t *clk_id, char *output, size_t output_len) in gptp_sprint_clock_id() argument
81 return net_sprint_ll_addr_buf(clk_id, 8, output, output_len); in gptp_sprint_clock_id()
Dgptp_mi.c566 memcpy(&state->pss_sync_ptr->sync_info.src_port_id.clk_id, in gptp_mi_pss_send_state_machine()
567 GPTP_DEFAULT_DS()->clk_id, in gptp_mi_pss_send_state_machine()
975 memcpy(&sync_info->src_port_id.clk_id, in gptp_mi_set_ps_sync_cmss()
976 GPTP_DEFAULT_DS()->clk_id, in gptp_mi_set_ps_sync_cmss()
1229 GPTP_DEFAULT_DS()->clk_id, GPTP_CLOCK_ID_LEN); in copy_path_trace()
1242 if (memcmp(hdr->port_id.clk_id, GPTP_DEFAULT_DS()->clk_id, in gptp_mi_qualify_announce()
1254 GPTP_DEFAULT_DS()->clk_id, in gptp_mi_qualify_announce()
1601 memcpy(global_ds->path_trace.path_sequence, GPTP_DEFAULT_DS()->clk_id, in gptp_updt_role_disabled_tree()
1637 memcpy(gm_prio->src_port_id.clk_id, default_ds->clk_id, in compute_best_vector()
1639 memcpy(gm_prio->root_system_id.grand_master_id, default_ds->clk_id, in compute_best_vector()
[all …]
Dgptp_md.c23 memcpy(&hdr->port_id.clk_id, &sync_send->src_port_id.clk_id, in gptp_md_sync_prepare()
44 memcpy(&hdr->port_id.clk_id, &sync_send->src_port_id.clk_id, in gptp_md_follow_up_prepare()
52 GPTP_DEFAULT_DS()->clk_id, GPTP_CLOCK_ID_LEN) == 0 && in gptp_md_follow_up_prepare()
410 local_clock = !memcmp(gptp_domain.default_ds.clk_id, in gptp_md_pdelay_compute()
411 hdr->port_id.clk_id, in gptp_md_pdelay_compute()
/Zephyr-latest/drivers/firmware/scmi/
Dclk.c26 uint32_t clk_id, uint32_t *rate) in scmi_clock_rate_get() argument
43 msg.len = sizeof(clk_id); in scmi_clock_rate_get()
44 msg.content = &clk_id; in scmi_clock_rate_get()
/Zephyr-latest/drivers/serial/
Duart_pl011_raspberrypi_pico.h10 #define RASPBERRYPI_PICO_UART_CLOCK_CTLR_SUBSYS_CELL clk_id
/Zephyr-latest/drivers/counter/
Dcounter_rpi_pico_timer.c38 clock_control_subsys_t clk_id; member
177 ret = clock_control_on(config->clk_dev, config->clk_id); in counter_rpi_pico_timer_init()
236 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(inst, clocks, 0, clk_id), \
/Zephyr-latest/include/zephyr/net/
Dgptp.h129 uint8_t clk_id[GPTP_CLOCK_ID_LEN]; member
297 char *gptp_sprint_clock_id(const uint8_t *clk_id, char *output,
/Zephyr-latest/drivers/adc/
Dadc_rpi_pico.c44 clock_control_subsys_t clk_id; member
311 ret = clock_control_on(config->clk_dev, config->clk_id); in adc_rpi_init()
367 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(idx, clocks, 0, clk_id), \
/Zephyr-latest/subsys/net/lib/shell/
Dgptp.c304 for (i = 0; i < sizeof(port_ds->port_id.clk_id); i++) { in gptp_print_port_info()
305 PR("%02x", port_ds->port_id.clk_id[i]); in gptp_print_port_info()
307 if (i != (sizeof(port_ds->port_id.clk_id) - 1)) { in gptp_print_port_info()
/Zephyr-latest/drivers/spi/
Dspi_rpi_pico_pio.c39 clock_control_subsys_t clk_id; member
210 rc = clock_control_on(dev_cfg->clk_dev, dev_cfg->clk_id); in spi_pico_pio_configure()
216 rc = clock_control_get_rate(dev_cfg->clk_dev, dev_cfg->clk_id, &clock_freq); in spi_pico_pio_configure()
756 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(inst, clocks, 0, clk_id), \
/Zephyr-latest/drivers/dai/nxp/sai/
Dsai.c834 void *clk_id; in sai_clks_enable_disable() local
839 clk_id = UINT_TO_POINTER(cfg->clk_data.clocks[i]); in sai_clks_enable_disable()
842 ret = clock_control_on(cfg->clk_data.dev, clk_id); in sai_clks_enable_disable()
844 ret = clock_control_off(cfg->clk_data.dev, clk_id); in sai_clks_enable_disable()

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