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Searched refs:clk_ctrl (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/drivers/timer/
Dstm32_lptim_timer.c49 static const struct device *const clk_ctrl = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); variable
248 clock_control_off(clk_ctrl, (clock_control_subsys_t) &lptim_clk[0]); in sys_clock_set_timeout()
263 clock_control_off(clk_ctrl, (clock_control_subsys_t) &lptim_clk[0]); in sys_clock_set_timeout()
272 err = clock_control_on(clk_ctrl, (clock_control_subsys_t) &lptim_clk[0]); in sys_clock_set_timeout()
411 if (!device_is_ready(clk_ctrl)) { in sys_clock_driver_init()
416 err = clock_control_on(clk_ctrl, (clock_control_subsys_t) &lptim_clk[0]); in sys_clock_driver_init()
426 err = clock_control_configure(clk_ctrl, in sys_clock_driver_init()
434 err = clock_control_get_rate(clk_ctrl, (clock_control_subsys_t) &lptim_clk[1], in sys_clock_driver_init()
595 if (clock_control_get_status(clk_ctrl, in stm32_clock_control_standby_exit()
/Zephyr-latest/drivers/crypto/
Dcrypto_mchp_xec_symcr.c121 struct mchp_xec_pcr_clk_ctrl clk_ctrl; member
503 ret = clock_control_on(cfg->clk_dev, (clock_control_subsys_t *)&cfg->clk_ctrl); in xec_symcr_init()
535 .clk_ctrl = { \
/Zephyr-latest/drivers/interrupt_controller/
Dintc_mchp_ecia_xec.c62 struct mchp_xec_pcr_clk_ctrl clk_ctrl; member
525 (clock_control_subsys_t)&cfg->clk_ctrl); in xec_ecia_init()
607 .clk_ctrl = {