/Zephyr-latest/drivers/adc/ |
D | iadc_gecko.c | 40 struct adc_gecko_channel_config channel_config[GECKO_CHANNEL_COUNT]; member 52 struct adc_gecko_channel_config *channel_config = NULL; in adc_gecko_set_config() local 61 channel_config = &data->channel_config[data->channel_id]; in adc_gecko_set_config() 63 initSingleInput.posInput = channel_config->input_positive; in adc_gecko_set_config() 64 initSingleInput.negInput = channel_config->input_negative; in adc_gecko_set_config() 66 initAllConfigs.configs[0].analogGain = channel_config->gain; in adc_gecko_set_config() 68 initAllConfigs.configs[0].reference = channel_config->reference; in adc_gecko_set_config() 144 if (!data->channel_config[index].initialized) { in start_read() 358 struct adc_gecko_channel_config *channel_config = NULL; in adc_gecko_channel_setup() local 361 channel_config = &data->channel_config[channel_cfg->channel_id]; in adc_gecko_channel_setup() [all …]
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D | adc_shell.c | 58 .channel_config = \ 74 struct adc_channel_cfg channel_config; member 177 adc->channel_config.channel_id = (uint8_t)strtol(argv[1], NULL, 10); in cmd_adc_ch_id() 178 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_id() 204 adc->channel_config.differential = (uint8_t)diff; in cmd_adc_ch_diff() 205 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_diff() 228 adc->channel_config.input_negative = (uint8_t)strtol(argv[1], NULL, 10); in cmd_adc_ch_neg() 229 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_neg() 255 adc->channel_config.input_positive = (uint8_t)strtol(argv[1], NULL, 10); in cmd_adc_ch_pos() 256 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_pos() [all …]
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D | adc_gecko.c | 37 struct adc_gecko_channel_config channel_config[GECKO_CHANNEL_COUNT]; member 49 struct adc_gecko_channel_config *channel_config = NULL; in adc_gecko_set_config() local 56 channel_config = &data->channel_config[data->channel_id]; in adc_gecko_set_config() 62 initSingle.reference = channel_config->reference; in adc_gecko_set_config() 66 initSingle.posSel = channel_config->input_select; in adc_gecko_set_config() 123 if (!data->channel_config[index].initialized) { in start_read() 225 struct adc_gecko_channel_config *channel_config = NULL; in adc_gecko_channel_setup() local 228 channel_config = &data->channel_config[channel_cfg->channel_id]; in adc_gecko_channel_setup() 234 channel_config->initialized = false; in adc_gecko_channel_setup() 236 channel_config->input_select = channel_cfg->input_positive; in adc_gecko_channel_setup() [all …]
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D | adc_xmc4xxx.c | 197 XMC_VADC_CHANNEL_CONFIG_t channel_config = {0}; in adc_xmc4xxx_channel_setup() local 230 channel_config.channel_priority = true; in adc_xmc4xxx_channel_setup() 231 channel_config.result_reg_number = ch_num; in adc_xmc4xxx_channel_setup() 232 channel_config.result_alignment = XMC_VADC_RESULT_ALIGN_RIGHT; in adc_xmc4xxx_channel_setup() 233 channel_config.alias_channel = -1; /* do not alias channel */ in adc_xmc4xxx_channel_setup() 234 XMC_VADC_GROUP_ChannelInit(adc_group, ch_num, &channel_config); in adc_xmc4xxx_channel_setup()
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D | adc_mcux_adc12.c | 161 adc12_channel_config_t channel_config; in mcux_adc12_start_channel() local 167 channel_config.enableInterruptOnConversionCompleted = true; in mcux_adc12_start_channel() 168 channel_config.channelNumber = data->channel_id; in mcux_adc12_start_channel() 175 channel_config.channelNumber += 16; in mcux_adc12_start_channel() 178 ADC12_SetChannelConfig(config->base, channel_group, &channel_config); in mcux_adc12_start_channel()
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D | adc_mcux_12b1msps_sar.c | 162 adc_channel_config_t channel_config; in mcux_12b1msps_sar_adc_start_channel() local 168 channel_config.enableInterruptOnConversionCompleted = true; in mcux_12b1msps_sar_adc_start_channel() 169 channel_config.channelNumber = data->channel_id; in mcux_12b1msps_sar_adc_start_channel() 170 ADC_SetChannelConfig(config->base, channel_group, &channel_config); in mcux_12b1msps_sar_adc_start_channel()
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D | adc_mcux_adc16.c | 253 adc16_channel_config_t channel_config; in mcux_adc16_start_channel() local 261 channel_config.enableDifferentialConversion = false; in mcux_adc16_start_channel() 263 channel_config.enableInterruptOnConversionCompleted = true; in mcux_adc16_start_channel() 264 channel_config.channelNumber = data->channel_id; in mcux_adc16_start_channel() 265 ADC16_SetChannelConfig(config->base, channel_group, &channel_config); in mcux_adc16_start_channel()
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D | adc_ifx_cat1.c | 133 const cyhal_adc_channel_config_t channel_config = { in ifx_cat1_adc_channel_setup() local 145 &data->adc_obj, vplus, vminus, &channel_config); in ifx_cat1_adc_channel_setup()
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D | adc_stm32wb0.c | 141 } channel_config[LL_ADC_CHANNEL_MAX]; member 619 const uint8_t ch_vin_range = data->channel_config[channel].vinput_range; in schedule_and_start_adc_sequence() 1001 data->channel_config[channel_id].vinput_range = vin_range; in adc_stm32wb0_channel_setup() 1212 .channel_config = {
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/Zephyr-latest/drivers/sensor/espressif/pcnt_esp32/ |
D | pcnt_esp32.c | 64 struct pcnt_esp32_channel_config channel_config[2]; member 164 unit_config->channel_config[0].sig_pos_mode, in pcnt_esp32_init() 165 unit_config->channel_config[0].sig_neg_mode); in pcnt_esp32_init() 167 unit_config->channel_config[1].sig_pos_mode, in pcnt_esp32_init() 168 unit_config->channel_config[1].sig_neg_mode); in pcnt_esp32_init() 170 unit_config->channel_config[0].ctrl_h_mode, in pcnt_esp32_init() 171 unit_config->channel_config[0].ctrl_l_mode); in pcnt_esp32_init() 173 unit_config->channel_config[1].ctrl_h_mode, in pcnt_esp32_init() 174 unit_config->channel_config[1].ctrl_l_mode); in pcnt_esp32_init() 377 .channel_config[0] = \ [all …]
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/Zephyr-latest/drivers/pwm/ |
D | pwm_led_esp32.c | 56 struct pwm_ledc_esp32_channel_config *channel_config; member 67 if (config->channel_config[i].idx == channel_id) { in get_channel_config() 68 return &config->channel_config[i]; in get_channel_config() 375 static struct pwm_ledc_esp32_channel_config channel_config[] = { variable 383 .channel_config = channel_config, 384 .channel_len = ARRAY_SIZE(channel_config),
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D | pwm_mc_esp32.c | 96 struct mcpwm_esp32_channel_config channel_config[MCPWM_CHANNEL_NUM]; member 209 struct mcpwm_esp32_channel_config *channel = &config->channel_config[channel_idx]; in mcpwm_esp32_get_cycles_per_sec() 242 struct mcpwm_esp32_channel_config *channel = &config->channel_config[channel_idx]; in mcpwm_esp32_set_cycles() 294 struct mcpwm_esp32_channel_config *channel = &config->channel_config[channel_idx]; in mcpwm_esp32_configure_capture() 332 struct mcpwm_esp32_channel_config *channel = &config->channel_config[channel_idx]; in mcpwm_esp32_disable_capture() 355 struct mcpwm_esp32_channel_config *channel = &config->channel_config[channel_idx]; in mcpwm_esp32_enable_capture() 415 channel = &config->channel_config[i]; in channel_init() 486 channel = &config->channel_config[CAPTURE_CHANNEL_IDX + cap_id]; in mcpwm_esp32_isr()
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/Zephyr-latest/include/zephyr/drivers/dma/ |
D | dma_stm32.h | 54 DT_INST_DMAS_CELL_BY_NAME(id, dir, channel_config) 56 DT_INST_DMAS_CELL_BY_IDX(id, idx, channel_config)
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/Zephyr-latest/drivers/i2c/ |
D | i2c_tca954x.c | 37 const struct tca954x_channel_config *channel_config = dev->config; in get_root_data_from_channel() local 39 return channel_config->root->data; in get_root_data_from_channel() 45 const struct tca954x_channel_config *channel_config = dev->config; in get_root_config_from_channel() local 47 return channel_config->root->config; in get_root_config_from_channel()
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/Zephyr-latest/drivers/dai/intel/dmic/ |
D | dmic_nhlt.h | 47 struct nhlt_dmic_channel_config channel_config[]; member
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/Zephyr-latest/subsys/ipc/ipc_service/backends/ |
D | ipc_icbmsg.c | 157 struct channel_config { struct 165 struct channel_config rx; /* RX channel config. */ argument 166 struct channel_config tx; /* TX channel config. */ 230 static struct block_content *block_from_index(const struct channel_config *ch_conf, in block_from_index() 250 static uint8_t *buffer_from_index_validate(const struct channel_config *ch_conf, in buffer_from_index_validate() 302 static int buffer_to_index_validate(const struct channel_config *ch_conf, in buffer_to_index_validate() 610 const struct channel_config *rx_conf = &dev_data->conf->rx; in find_ept_by_name()
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/Zephyr-latest/subsys/mgmt/ec_host_cmd/backends/ |
D | ec_host_cmd_backend_spi_stm32.c | 194 DT_DMAS_CELL_BY_NAME(id, dir, channel_config)), \ 196 DT_DMAS_CELL_BY_NAME(id, dir, channel_config)), \ 198 DT_DMAS_CELL_BY_NAME(id, dir, channel_config)), \ 202 DT_DMAS_CELL_BY_NAME(id, dir, channel_config)), \
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/Zephyr-latest/drivers/dai/intel/ssp/ |
D | dai-params-intel-ipc4.h | 93 uint32_t channel_config; member
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D | ssp.c | 1964 tr->channel_config, tr->interleaving_style, tr->format); in dai_ssp_parse_tlv()
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/Zephyr-latest/drivers/spi/ |
D | spi_pl022.c | 257 uint32_t channel_config; member 991 .channel_config = DT_INST_DMAS_CELL_BY_NAME(idx, dir, channel_config), \
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D | spi_andes_atcspi200.c | 883 DT_INST_DMAS_CELL_BY_NAME(id, dir, channel_config)
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/Zephyr-latest/drivers/flash/ |
D | flash_stm32_qspi.c | 1568 DT_DMAS_CELL_BY_NAME(node, dir, channel_config)
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D | flash_stm32_xspi.c | 2354 DT_DMAS_CELL_BY_NAME(node, dir, channel_config)
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D | flash_stm32_ospi.c | 2536 DT_DMAS_CELL_BY_NAME(node, dir, channel_config)
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