| /Zephyr-latest/arch/arc/core/ |
| D | smp.c | 99 struct arc_connect_bcr bcr; in arch_secondary_cpu_init() local
101 bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR); in arch_secondary_cpu_init()
103 if (bcr.dbg) { in arch_secondary_cpu_init()
163 struct arc_connect_bcr bcr; in arch_smp_init() local
168 bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR); in arch_smp_init()
170 if (bcr.dbg) { in arch_smp_init()
175 if (bcr.ipi) { in arch_smp_init()
189 if (bcr.gfrc) { in arch_smp_init()
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| /Zephyr-latest/drivers/i3c/ |
| D | i3c_common.c | 458 struct i3c_ccc_getbcr bcr = {0}; in i3c_device_basic_info_get() local
471 tmp_bcr = target->bcr; in i3c_device_basic_info_get()
474 ret = i3c_ccc_do_getbcr(target, &bcr); in i3c_device_basic_info_get()
479 target->bcr = bcr.bcr; in i3c_device_basic_info_get()
510 } else if ((ret != 0) && (target->bcr & I3C_BCR_ADV_CAPABILITIES)) { in i3c_device_basic_info_get()
517 if (target->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT) { in i3c_device_basic_info_get()
536 target->bcr = tmp_bcr; in i3c_device_basic_info_get()
683 deftgts->active_controller.bcr = config_target.bcr; in i3c_bus_deftgts()
692 deftgts->targets[n].bcr = i3c_desc->bcr; in i3c_bus_deftgts()
703 deftgts->targets[n].bcr = 0; in i3c_bus_deftgts()
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| D | i3c_ccc.c | 19 struct i3c_ccc_getbcr *bcr) in i3c_ccc_do_getbcr() argument
26 __ASSERT_NO_MSG(bcr != NULL); in i3c_ccc_do_getbcr()
30 ccc_tgt_payload.data = &bcr->bcr; in i3c_ccc_do_getbcr()
31 ccc_tgt_payload.data_len = sizeof(bcr->bcr); in i3c_ccc_do_getbcr()
408 if ((target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) in i3c_ccc_do_setmrl()
433 has_ibi_sz = (target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) in i3c_ccc_do_getmrl()
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| D | i3c_shell.c | 218 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
264 desc->bcr, desc->dcr, desc->data_speed.maxrd, in cmd_i3c_info()
732 struct i3c_ccc_getbcr bcr; in cmd_i3c_ccc_getbcr() local
740 ret = i3c_ccc_do_getbcr(desc, &bcr); in cmd_i3c_ccc_getbcr()
746 shell_print(sh, "BCR: 0x%02x", bcr.bcr); in cmd_i3c_ccc_getbcr()
747 desc->bcr = bcr.bcr; in cmd_i3c_ccc_getbcr()
821 if (desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) { in cmd_i3c_ccc_getmrl()
871 if ((desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) && (argc < 5)) { in cmd_i3c_ccc_setmrl()
948 if ((argc > 3) && (desc->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE)) { in cmd_i3c_ccc_setmrl_bc()
1658 if (!(desc->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT)) { in cmd_i3c_ccc_getmxds()
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| D | i3c_cdns.c | 384 #define DEV_ID_RR2_BCR(bcr) ((bcr) << 8) argument
1039 sir_cfg = SIR_MAP_DEV_ROLE(I3C_BCR_DEVICE_ROLE(target->bcr)) | in cdns_i3c_controller_ibi_enable()
1045 if (target->bcr & I3C_BCR_MAX_DATA_SPEED_LIMIT) { in cdns_i3c_controller_ibi_enable()
1050 target->bcr); in cdns_i3c_controller_ibi_enable()
1561 uint8_t bcr = dev_id_rr2 >> 8; in cdns_i3c_do_daa() local
1575 target->bcr = bcr; in cdns_i3c_do_daa()
2032 uint32_t dev_id_rr2 = DEV_ID_RR2_PID_LSB(desc->pid & 0xFFFF) | DEV_ID_RR2_BCR(desc->bcr) | in cdns_i3c_reattach_device()
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| D | i3c_npcx.c | 1406 target->bcr = rx_buf[6]; in npcx_i3c_do_daa()
1794 LOG_DBG("IBI enabling for 0x%02x (BCR 0x%02x)", target->dynamic_addr, target->bcr); in npcx_i3c_ibi_enable()
2525 SET_FIELD(inst->IDEXT, NPCX_I3C_IDEXT_BCR, config_target->bcr); in npcx_i3c_apply_target_config()
2553 if (I3C_BCR_DEVICE_ROLE(config_target->bcr) == I3C_BCR_DEVICE_ROLE_I3C_CONTROLLER_CAPABLE) { in npcx_i3c_dev_init()
3039 .config_target.bcr = DT_INST_PROP(id, bcr), \
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| D | i3c_stm32.c | 1592 uint8_t bcr; in i3c_stm32_event_isr_tx() local
1597 bcr = (data->pid >> 8) & 0xFF; in i3c_stm32_event_isr_tx()
1620 target->bcr = bcr; in i3c_stm32_event_isr_tx()
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| D | i3c_mcux.c | 1278 target->bcr = rx_buf[6]; in mcux_i3c_do_daa()
1661 target->dynamic_addr, target->bcr); in mcux_i3c_ibi_enable()
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_smsc911x.c | 306 uint32_t bcr = 0U; in smsc_establish_link() local
309 smsc_phy_regread(SMSC9220_PHY_BCONTROL, &bcr); in smsc_establish_link()
310 bcr |= (1 << 12) | (1 << 9); in smsc_establish_link()
311 smsc_phy_regwrite(SMSC9220_PHY_BCONTROL, bcr); in smsc_establish_link()
312 smsc_phy_regread(SMSC9220_PHY_BCONTROL, &bcr); in smsc_establish_link()
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | i3c.h | 140 #define I3C_BCR_DEVICE_ROLE(bcr) \ argument
141 FIELD_GET(I3C_BCR_DEVICE_ROLE_MASK, (bcr))
1005 uint8_t bcr; member
1765 return (target->bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE) in i3c_ibi_has_payload()
1782 return (target->bcr & I3C_BCR_IBI_REQUEST_CAPABLE) in i3c_device_is_ibi_capable()
1799 return I3C_BCR_DEVICE_ROLE(target->bcr) in i3c_device_is_controller_capable()
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| /Zephyr-latest/include/zephyr/drivers/i3c/ |
| D | ccc.h | 411 uint8_t bcr; member
439 uint8_t bcr; member
525 uint8_t bcr; member
1388 struct i3c_ccc_getbcr *bcr);
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| D | target_device.h | 71 uint8_t bcr; member
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| /Zephyr-latest/drivers/can/ |
| D | can_rcar.c | 726 uint32_t bcr; in can_rcar_set_bittiming() local
728 bcr = RCAR_CAN_BCR_TSEG1(timing->phase_seg1 + timing->prop_seg - 1) | in can_rcar_set_bittiming()
737 sys_write32((bcr << 8) | RCAR_CAN_CLKR_CLKP2, in can_rcar_set_bittiming()
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