| /Zephyr-latest/kernel/ |
| D | Kconfig.mem_domain | 20 This hidden option is selected by the target architecture if
21 architecture-specific data is needed on a per memory domain basis.
22 If so, the architecture defines a 'struct arch_mem_domain' which is
23 embedded within every struct k_mem_domain. The architecture
33 This hidden option is selected by the target architecture if
36 into the architecture layer.
38 If enabled, the architecture layer must implement the following
60 This hidden option is selected by the target architecture if
61 the architecture supports isolating thread stacks for threads
|
| /Zephyr-latest/scripts/tests/twister/ |
| D | test_quarantine.py | 234 architecture, argument
265 architecture=architecture,
272 architecture=architecture,
|
| /Zephyr-latest/doc/services/dsp/ |
| D | index.rst | 10 The DSP API provides an architecture agnostic way for signal processing.
11 Currently, the API will work on any architecture but will likely not be
44 Optimizing for your architecture
47 If your architecture is showing as ``Unoptimized``, it's possible to add a new
53 linked in at :file:`subsys/dsp/CMakeLists.txt`. To add architecture-specific attributes,
|
| /Zephyr-latest/include/zephyr/arch/arm/ |
| D | asm_inline_gcc.h | 69 #error Unknown ARM architecture in arch_irq_lock()
98 #error Unknown ARM architecture in arch_irq_unlock()
|
| D | exception.h | 23 #error Unknown ARM architecture
|
| D | error.h | 68 #error Unknown ARM architecture
|
| /Zephyr-latest/subsys/testsuite/arch/unit_testing/ |
| D | Kconfig | 11 The unit_testing architecture identifies itself as X86 for basic
21 The unit testing architecture is expected to always have access to a
|
| /Zephyr-latest/doc/services/pm/ |
| D | overview.rst | 5 are designed to be architecture and SOC independent. This enables power
9 The architecture and SOC independence is achieved by separating the core PM
|
| /Zephyr-latest/scripts/pylib/twister/twisterlib/ |
| D | quarantine.py | 38 def get_matched_quarantine(self, testname, platform, architecture, simulator): argument
39 qelem = self.quarantine.get_matched_quarantine(testname, platform, architecture, simulator)
117 architecture: str,
130 and (matched := _is_element_matched(architecture, qelem.re_architectures)) is False
|
| /Zephyr-latest/doc/services/llext/ |
| D | index.rst | 23 The LLEXT subsystem requires architecture-specific support. It is currently
25 Harvard architecture cores that separate code and data paths and have no
|
| /Zephyr-latest/arch/ |
| D | Kconfig | 1 # General architecture configuration options
29 ARC architecture
42 ARM architecture
60 ARM64 (AArch64) architecture
67 MIPS architecture
80 SPARC architecture
104 x86 architecture
113 Nios II Gen 2 architecture
131 RISCV architecture
145 Xtensa architecture
[all …]
|
| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | fault_s.S | 34 #error Unknown ARM architecture
76 #error Unknown ARM architecture
|
| D | vector_table.h | 48 #error Unknown ARM architecture
|
| D | irq_manage.c | 129 #error Unknown ARM architecture in _arch_isr_direct_pm()
142 #error Unknown ARM architecture in _arch_isr_direct_pm()
|
| /Zephyr-latest/doc/hardware/porting/ |
| D | arch.rst | 6 An architecture port is needed to enable Zephyr to run on an :abbr:`ISA
7 (instruction set architecture)` or an :abbr:`ABI (Application Binary
20 An architecture port can be divided in several parts; most are required and
23 * **The early boot sequence**: each architecture has different steps it must
26 * **Interrupt and exception handling**: each architecture handles asynchronous
33 and architecture-dependent, and thread abortion possibly as well (required).
36 controller are tied to the architecture (some required, some optional).
39 architecture-specific implementation for performance reasons (required).
44 * **Fault management**: for implementing architecture-specific debug help and
47 * **Linker scripts and toolchains**: architecture-specific details will most
[all …]
|
| /Zephyr-latest/arch/posix/include/ |
| D | asm_inline.h | 14 #error The arch/posix/include/asm_inline.h is only for the POSIX architecture
|
| /Zephyr-latest/samples/arch/ |
| D | index.rst | 5 Samples that demonstrate some architecture-specific features.
|
| /Zephyr-latest/soc/intel/intel_ish/doc/ |
| D | supported_features.txt | 4 In addition to the standard architecture devices (HPET, local and I/O APICs,
|
| /Zephyr-latest/arch/arm64/ |
| D | Kconfig | 1 # ARM64 architecture configuration options
28 When this option is selected, the architecture interrupt control
|
| /Zephyr-latest/arch/arm/core/cortex_a_r/ |
| D | Kconfig | 151 From https://developer.arm.com/products/architecture/cpu-architecture/r-profile:
152 The Armv7-R architecture implements a traditional Arm architecture with
173 From https://developer.arm.com/products/architecture/cpu-architecture/r-profile:
174 The Armv8-R architecture targets at the Real-time profile. It introduces
|
| /Zephyr-latest/boards/native/doc/ |
| D | arch_soc.rst | 3 The POSIX architecture
14 The native simulator in combination with the POSIX architecture and the inf_clock SOC layer,
15 provide the foundation, architecture and SOC layers for a set of virtual test
22 Zephyr application, eliminating the need for architecture-specific
27 The POSIX architecture is not related and should not be confused with the
61 The POSIX architecture is known to **not** work on macOS due to
177 Currently, these are the most significant features which are not supported in this architecture:
188 :ref:`the architecture section's architecture layer paragraph <posix_arch_design_archl>`
240 This native port compiles your code directly for the host architecture
251 The drivers and HW models for this architecture will hide this from the
[all …]
|
| /Zephyr-latest/soc/common/riscv-privileged/ |
| D | Kconfig | 2 # architecture specification
|
| /Zephyr-latest/soc/intel/alder_lake/doc/ |
| D | supported_features.txt | 4 In addition to the standard architecture devices (HPET, local and I/O APICs,
|
| /Zephyr-latest/soc/intel/elkhart_lake/doc/ |
| D | supported_features.txt | 4 In addition to the standard architecture devices (HPET, local and I/O APICs,
|
| /Zephyr-latest/soc/intel/raptor_lake/doc/ |
| D | supported_features.txt | 4 In addition to the standard architecture devices (HPET, local and I/O APICs,
|
