Searched refs:access_rights (Results 1 – 4 of 4) sorted by relevance
| /Zephyr-latest/include/zephyr/arch/xtensa/ |
| D | mpu.h | 161 uint32_t access_rights:4; member
200 static inline bool xtensa_mem_partition_is_executable(k_mem_partition_attr_t access_rights) in xtensa_mem_partition_is_executable() argument
204 switch (access_rights) { in xtensa_mem_partition_is_executable()
223 static inline bool xtensa_mem_partition_is_writable(k_mem_partition_attr_t access_rights) in xtensa_mem_partition_is_writable() argument
227 switch (access_rights) { in xtensa_mem_partition_is_writable()
246 #define K_MEM_PARTITION_IS_EXECUTABLE(access_rights) \ argument
247 (xtensa_mem_partition_is_executable(access_rights))
249 #define K_MEM_PARTITION_IS_WRITABLE(access_rights) \ argument
250 (xtensa_mem_partition_is_writable(access_rights))
287 const uint8_t access_rights:4; member
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_mpu_priv.h | 121 .at.p.access_rights = rights, \
278 return entry->at.p.access_rights; in xtensa_mpu_entry_access_rights_get()
288 void xtensa_mpu_entry_access_rights_set(struct xtensa_mpu_entry *entry, uint8_t access_rights) in xtensa_mpu_entry_access_rights_set() argument
290 entry->at.p.access_rights = access_rights; in xtensa_mpu_entry_access_rights_set()
327 uint8_t access_rights, uint16_t memory_type) in xtensa_mpu_entry_attributes_set() argument
329 xtensa_mpu_entry_access_rights_set(entry, access_rights); in xtensa_mpu_entry_attributes_set()
349 bool enable, uint8_t access_rights, uint16_t memory_type) in xtensa_mpu_entry_set() argument
359 xtensa_mpu_entry_access_rights_set(entry, access_rights); in xtensa_mpu_entry_set()
377 return entry1->at.p.access_rights == entry2->at.p.access_rights; in xtensa_mpu_entries_has_same_access_rights()
444 static ALWAYS_INLINE bool xtensa_mpu_access_rights_is_valid(uint8_t access_rights) in xtensa_mpu_access_rights_is_valid() argument
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| /Zephyr-latest/arch/xtensa/core/ |
| D | mpu.c | 98 .access_rights = XTENSA_MPU_ACCESS_P_RX_U_RX,
109 .access_rights = XTENSA_MPU_ACCESS_P_RW_U_NA,
117 .access_rights = XTENSA_MPU_ACCESS_P_RW_U_NA,
125 .access_rights = XTENSA_MPU_ACCESS_P_RX_U_RX,
132 .access_rights = XTENSA_MPU_ACCESS_P_RO_U_RO,
379 e->at.p.access_rights = XTENSA_MPU_ACCESS_P_NA_U_NA; in consolidate_entries()
411 uint32_t access_rights, uint32_t memory_type, in mpu_map_region_add() argument
448 access_rights, memory_type); in mpu_map_region_add()
463 access_rights, memory_type); in mpu_map_region_add()
539 xtensa_mpu_entry_set(entry_slot_s, start_addr, true, access_rights, memory_type); in mpu_map_region_add()
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| /Zephyr-latest/subsys/net/lib/lwm2m/ |
| D | lwm2m_obj_access_control.c | 226 uint16_t access_rights = 0; in check_acl_table() local
234 access_rights |= ac_data[idx].acl[i]; in check_acl_table()
242 return (access_rights & access) == access; in check_acl_table()
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