Lines Matching refs:access_rights
98 .access_rights = XTENSA_MPU_ACCESS_P_RX_U_RX,
109 .access_rights = XTENSA_MPU_ACCESS_P_RW_U_NA,
117 .access_rights = XTENSA_MPU_ACCESS_P_RW_U_NA,
125 .access_rights = XTENSA_MPU_ACCESS_P_RX_U_RX,
132 .access_rights = XTENSA_MPU_ACCESS_P_RO_U_RO,
379 e->at.p.access_rights = XTENSA_MPU_ACCESS_P_NA_U_NA; in consolidate_entries()
411 uint32_t access_rights, uint32_t memory_type, in mpu_map_region_add() argument
448 access_rights, memory_type); in mpu_map_region_add()
463 access_rights, memory_type); in mpu_map_region_add()
539 xtensa_mpu_entry_set(entry_slot_s, start_addr, true, access_rights, memory_type); in mpu_map_region_add()
602 xtensa_mpu_entry_attributes_set(&entries[idx], access_rights, memory_type); in mpu_map_region_add()
689 ent.at.p.access_rights = XTENSA_MPU_ACCESS_P_NA_U_NA; in xtensa_mpu_init()
706 range->access_rights, range->memory_type, in xtensa_mpu_init()
725 range->access_rights, range->memory_type, in xtensa_mpu_init()
1033 uint8_t access_rights = (probed & XTENSA_MPU_PPTLB_ACCESS_RIGHTS_MASK) in arch_buffer_validate() local
1038 switch (access_rights) { in arch_buffer_validate()
1054 switch (access_rights) { in arch_buffer_validate()
1104 uint8_t access_rights = (probed & XTENSA_MPU_PPTLB_ACCESS_RIGHTS_MASK) in xtensa_mem_kernel_has_access() local
1110 switch (access_rights) { in xtensa_mem_kernel_has_access()
1134 switch (access_rights) { in xtensa_mem_kernel_has_access()