Searched refs:XTENSA_MMU_CACHED_WB (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-latest/soc/intel/intel_adsp/ace/ |
| D | mmu_ace30.c | 34 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
46 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
77 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
99 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
106 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
112 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
118 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
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| /Zephyr-latest/soc/cdns/dc233c/ |
| D | mmu.c | 19 .attrs = XTENSA_MMU_PERM_X | XTENSA_MMU_CACHED_WB | XTENSA_MMU_MAP_SHARED,
30 .attrs = XTENSA_MMU_PERM_X | XTENSA_MMU_CACHED_WB,
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| /Zephyr-latest/include/zephyr/arch/xtensa/ |
| D | xtensa_mmu.h | 33 #define XTENSA_MMU_CACHED_WB BIT(2) macro
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| /Zephyr-latest/arch/xtensa/core/ |
| D | ptables.c | 127 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
139 .attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
148 .attrs = XTENSA_MMU_PERM_X | XTENSA_MMU_CACHED_WB | XTENSA_MMU_MAP_SHARED,
155 .attrs = XTENSA_MMU_CACHED_WB | XTENSA_MMU_MAP_SHARED,
259 attrs | XTENSA_MMU_CACHED_WB); in map_memory()
426 flags = flags_uc | XTENSA_MMU_CACHED_WB; in __arch_mem_map()
491 xtensa_flags |= XTENSA_MMU_CACHED_WB; in arch_mem_map()
896 new_flags = new_flags_uc | XTENSA_MMU_CACHED_WB; in update_region()
933 XTENSA_MMU_USER_RING, XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB, 0); in xtensa_user_stack_perms()
984 XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB, in arch_mem_domain_thread_add()
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_mmu_priv.h | 118 #define XTENSA_MMU_PAGE_TABLE_ATTR XTENSA_MMU_CACHED_WB
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