Home
last modified time | relevance | path

Searched refs:STM32_SYSCLK_SRC_HSE (Results 1 – 13 of 13) sorted by relevance

/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32wba_core/src/
Dtest_stm32_clock_configuration.c33 #elif STM32_SYSCLK_SRC_HSE in ZTEST()
44 STM32_SYSCLK_SRC_HSE || in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core/src/
Dtest_stm32_clock_configuration.c33 #elif STM32_SYSCLK_SRC_HSE in ZTEST()
48 STM32_SYSCLK_SRC_HSE || in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/
Dtest_stm32_clock_configuration.c33 #elif STM32_SYSCLK_SRC_HSE in ZTEST()
48 STM32_SYSCLK_SRC_HSE || in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/src/
Dtest_stm32_clock_configuration.c33 #elif STM32_SYSCLK_SRC_HSE in ZTEST()
48 STM32_SYSCLK_SRC_HSE || in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/src/
Dtest_stm32_clock_configuration.c42 #elif STM32_SYSCLK_SRC_HSE in ZTEST()
57 STM32_SYSCLK_SRC_HSE || in ZTEST()
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wb0.c65 BUILD_ASSERT(!IS_ENABLED(STM32_SYSCLK_SRC_HSE) || STM32_WB0_CLKSYS_PRESCALER != 64,
596 #if defined(STM32_SYSCLK_SRC_HSE)
621 #if !defined(STM32_SYSCLK_SRC_HSE) in kconfig_to_ll_prescaler()
733 #if defined(STM32_SYSCLK_SRC_HSE) in stm32_clock_control_init()
Dclock_stm32_ll_h5.c107 #elif defined(STM32_SYSCLK_SRC_HSE) in get_sysclk_frequency()
752 } else if (IS_ENABLED(STM32_SYSCLK_SRC_HSE)) { in stm32_clock_control_init()
Dclock_stm32_ll_u5.c112 #elif defined(STM32_SYSCLK_SRC_HSE) in get_sysclk_frequency()
885 } else if (IS_ENABLED(STM32_SYSCLK_SRC_HSE)) { in stm32_clock_control_init()
Dclock_stm32_ll_n6.c141 #if defined(STM32_SYSCLK_SRC_HSE) in get_sysclk_frequency()
917 if (IS_ENABLED(STM32_SYSCLK_SRC_HSE)) { in stm32_clock_control_init()
Dclock_stm32_ll_wba.c596 } else if (IS_ENABLED(STM32_SYSCLK_SRC_HSE)) { in stm32_clock_control_init()
Dclock_stm32_ll_h7.c85 #elif defined(STM32_SYSCLK_SRC_HSE)
1154 } else if (IS_ENABLED(STM32_SYSCLK_SRC_HSE)) {
Dclock_stm32_ll_common.c845 #elif STM32_SYSCLK_SRC_HSE in stm32_clock_control_init()
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h136 #define STM32_SYSCLK_SRC_HSE 1 macro