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Searched refs:STM32_SRC_PLLI2S_R (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32f4_clock.h39 #define STM32_SRC_PLLI2S_R (STM32_SRC_PLLI2S_Q + 1) macro
41 #define STM32_SRC_CK48 (STM32_SRC_PLLI2S_R + 1)
Dstm32f7_clock.h41 #define STM32_SRC_PLLI2S_R (STM32_SRC_PCLK + 1) macro
/Zephyr-latest/samples/boards/st/mco/boards/
Dnucleo_f446ze.overlay25 clocks = <&rcc STM32_SRC_PLLI2S_R MCO2_SEL(1)>;
Dnucleo_f411re.overlay30 clocks = <&rcc STM32_SRC_PLLI2S_R MCO2_SEL(1)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_i2s.c47 if (pclken[1].bus == STM32_SRC_PLLI2S_R) { in ZTEST()
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/
Df4_i2s2_pll.overlay82 <&rcc STM32_SRC_PLLI2S_R I2S_SEL(0)>;
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_common.c222 #if defined(STM32_SRC_PLLI2S_R) in enabled_clock()
223 case STM32_SRC_PLLI2S_R: in enabled_clock()
436 #if defined(STM32_SRC_PLLI2S_R) & STM32_PLLI2S_ENABLED in stm32_clock_control_get_subsys_rate()
437 case STM32_SRC_PLLI2S_R: in stm32_clock_control_get_subsys_rate()
/Zephyr-latest/boards/st/stm32f4_disco/
Dstm32f4_disco.dts200 <&rcc STM32_SRC_PLLI2S_R I2S_SEL(0)>;