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Searched refs:STM32_SRC_PCLK2 (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32wba_clock.h25 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1) macro
26 #define STM32_SRC_PCLK7 (STM32_SRC_PCLK2 + 1)
Dstm32u5_clock.h27 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1) macro
28 #define STM32_SRC_PCLK3 (STM32_SRC_PCLK2 + 1)
Dstm32h5_clock.h26 #define STM32_SRC_PCLK2 (STM32_SRC_PCLK1 + 1) macro
27 #define STM32_SRC_PCLK3 (STM32_SRC_PCLK2 + 1)
Dstm32h7_clock.h53 #define STM32_SRC_PCLK2 STM32_CLOCK_BUS_APB2 macro
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wba.c50 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()
217 case STM32_SRC_PCLK2: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_h5.c124 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()
242 case STM32_SRC_PCLK2: in stm32_clock_control_get_subsys_rate()
Dclock_stm32_ll_u5.c129 (src_clk == STM32_SRC_PCLK2) || in enabled_clock()
252 case STM32_SRC_PCLK2: in stm32_clock_control_get_subsys_rate()